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1e9fdf21a4
Scattered across the archs are 3 basic forms of tlb_{start,end}_vma().
Provide two new MMU_GATHER_knobs to enumerate them and remove the per
arch tlb_{start,end}_vma() implementations.
- MMU_GATHER_NO_FLUSH_CACHE indicates the arch has flush_cache_range()
but does *NOT* want to call it for each VMA.
- MMU_GATHER_MERGE_VMAS indicates the arch wants to merge the
invalidate across multiple VMAs if possible.
With these it is possible to capture the three forms:
1) empty stubs;
select MMU_GATHER_NO_FLUSH_CACHE and MMU_GATHER_MERGE_VMAS
2) start: flush_cache_range(), end: empty;
select MMU_GATHER_MERGE_VMAS
3) start: flush_cache_range(), end: flush_tlb_range();
default
Obviously, if the architecture does not have flush_cache_range() then
it also doesn't need to select MMU_GATHER_NO_FLUSH_CACHE.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Will Deacon <will@kernel.org>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
38 lines
960 B
C
38 lines
960 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _SPARC64_TLB_H
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#define _SPARC64_TLB_H
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#include <linux/swap.h>
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#include <linux/pagemap.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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#ifdef CONFIG_SMP
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void smp_flush_tlb_pending(struct mm_struct *,
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unsigned long, unsigned long *);
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#endif
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#ifdef CONFIG_SMP
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void smp_flush_tlb_mm(struct mm_struct *mm);
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#define do_flush_tlb_mm(mm) smp_flush_tlb_mm(mm)
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#else
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#define do_flush_tlb_mm(mm) __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT)
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#endif
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void __flush_tlb_pending(unsigned long, unsigned long, unsigned long *);
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void flush_tlb_pending(void);
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#define tlb_flush(tlb) flush_tlb_pending()
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/*
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* SPARC64's hardware TLB fill does not use the Linux page-tables
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* and therefore we don't need a TLBI when freeing page-table pages.
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*/
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#ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE
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#define tlb_needs_table_invalidate() (false)
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#endif
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#include <asm-generic/tlb.h>
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#endif /* _SPARC64_TLB_H */
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