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69dcb1e3bb
In advance of providing support for unaccepted memory, switch from using kmalloc() for allocating the Page State Change (PSC) structure to using a local variable that lives on the stack. This is needed to avoid a possible recursive call into set_pages_state() if the kmalloc() call requires (more) memory to be accepted, which would result in a hang. The current size of the PSC struct is 2,032 bytes. To make the struct more stack friendly, reduce the number of PSC entries from 253 down to 64, resulting in a size of 520 bytes. This is a nice compromise on struct size and total PSC requests while still allowing parallel PSC operations across vCPUs. If the reduction in PSC entries results in any kind of performance issue (that is not seen at the moment), use of a larger static PSC struct, with fallback to the smaller stack version, can be investigated. For more background info on this decision, see the subthread in the Link: tag below. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/lkml/658c455c40e8950cb046dd885dd19dc1c52d060a.1659103274.git.thomas.lendacky@amd.com
176 lines
5 KiB
C
176 lines
5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* AMD SEV header common between the guest and the hypervisor.
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*
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* Author: Brijesh Singh <brijesh.singh@amd.com>
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*/
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#ifndef __ASM_X86_SEV_COMMON_H
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#define __ASM_X86_SEV_COMMON_H
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#define GHCB_MSR_INFO_POS 0
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#define GHCB_DATA_LOW 12
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#define GHCB_MSR_INFO_MASK (BIT_ULL(GHCB_DATA_LOW) - 1)
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#define GHCB_DATA(v) \
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(((unsigned long)(v) & ~GHCB_MSR_INFO_MASK) >> GHCB_DATA_LOW)
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/* SEV Information Request/Response */
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#define GHCB_MSR_SEV_INFO_RESP 0x001
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#define GHCB_MSR_SEV_INFO_REQ 0x002
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#define GHCB_MSR_SEV_INFO(_max, _min, _cbit) \
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/* GHCBData[63:48] */ \
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((((_max) & 0xffff) << 48) | \
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/* GHCBData[47:32] */ \
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(((_min) & 0xffff) << 32) | \
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/* GHCBData[31:24] */ \
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(((_cbit) & 0xff) << 24) | \
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GHCB_MSR_SEV_INFO_RESP)
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#define GHCB_MSR_INFO(v) ((v) & 0xfffUL)
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#define GHCB_MSR_PROTO_MAX(v) (((v) >> 48) & 0xffff)
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#define GHCB_MSR_PROTO_MIN(v) (((v) >> 32) & 0xffff)
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/* CPUID Request/Response */
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#define GHCB_MSR_CPUID_REQ 0x004
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#define GHCB_MSR_CPUID_RESP 0x005
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#define GHCB_MSR_CPUID_FUNC_POS 32
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#define GHCB_MSR_CPUID_FUNC_MASK 0xffffffff
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#define GHCB_MSR_CPUID_VALUE_POS 32
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#define GHCB_MSR_CPUID_VALUE_MASK 0xffffffff
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#define GHCB_MSR_CPUID_REG_POS 30
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#define GHCB_MSR_CPUID_REG_MASK 0x3
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#define GHCB_CPUID_REQ_EAX 0
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#define GHCB_CPUID_REQ_EBX 1
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#define GHCB_CPUID_REQ_ECX 2
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#define GHCB_CPUID_REQ_EDX 3
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#define GHCB_CPUID_REQ(fn, reg) \
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/* GHCBData[11:0] */ \
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(GHCB_MSR_CPUID_REQ | \
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/* GHCBData[31:12] */ \
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(((unsigned long)(reg) & 0x3) << 30) | \
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/* GHCBData[63:32] */ \
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(((unsigned long)fn) << 32))
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/* AP Reset Hold */
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#define GHCB_MSR_AP_RESET_HOLD_REQ 0x006
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#define GHCB_MSR_AP_RESET_HOLD_RESP 0x007
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/* GHCB GPA Register */
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#define GHCB_MSR_REG_GPA_REQ 0x012
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#define GHCB_MSR_REG_GPA_REQ_VAL(v) \
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/* GHCBData[63:12] */ \
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(((u64)((v) & GENMASK_ULL(51, 0)) << 12) | \
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/* GHCBData[11:0] */ \
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GHCB_MSR_REG_GPA_REQ)
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#define GHCB_MSR_REG_GPA_RESP 0x013
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#define GHCB_MSR_REG_GPA_RESP_VAL(v) \
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/* GHCBData[63:12] */ \
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(((u64)(v) & GENMASK_ULL(63, 12)) >> 12)
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/*
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* SNP Page State Change Operation
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*
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* GHCBData[55:52] - Page operation:
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* 0x0001 Page assignment, Private
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* 0x0002 Page assignment, Shared
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*/
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enum psc_op {
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SNP_PAGE_STATE_PRIVATE = 1,
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SNP_PAGE_STATE_SHARED,
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};
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#define GHCB_MSR_PSC_REQ 0x014
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#define GHCB_MSR_PSC_REQ_GFN(gfn, op) \
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/* GHCBData[55:52] */ \
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(((u64)((op) & 0xf) << 52) | \
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/* GHCBData[51:12] */ \
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((u64)((gfn) & GENMASK_ULL(39, 0)) << 12) | \
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/* GHCBData[11:0] */ \
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GHCB_MSR_PSC_REQ)
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#define GHCB_MSR_PSC_RESP 0x015
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#define GHCB_MSR_PSC_RESP_VAL(val) \
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/* GHCBData[63:32] */ \
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(((u64)(val) & GENMASK_ULL(63, 32)) >> 32)
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/* GHCB Hypervisor Feature Request/Response */
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#define GHCB_MSR_HV_FT_REQ 0x080
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#define GHCB_MSR_HV_FT_RESP 0x081
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#define GHCB_MSR_HV_FT_RESP_VAL(v) \
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/* GHCBData[63:12] */ \
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(((u64)(v) & GENMASK_ULL(63, 12)) >> 12)
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#define GHCB_HV_FT_SNP BIT_ULL(0)
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#define GHCB_HV_FT_SNP_AP_CREATION BIT_ULL(1)
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/*
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* SNP Page State Change NAE event
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* The VMGEXIT_PSC_MAX_ENTRY determines the size of the PSC structure, which
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* is a local stack variable in set_pages_state(). Do not increase this value
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* without evaluating the impact to stack usage.
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*/
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#define VMGEXIT_PSC_MAX_ENTRY 64
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struct psc_hdr {
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u16 cur_entry;
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u16 end_entry;
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u32 reserved;
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} __packed;
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struct psc_entry {
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u64 cur_page : 12,
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gfn : 40,
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operation : 4,
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pagesize : 1,
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reserved : 7;
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} __packed;
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struct snp_psc_desc {
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struct psc_hdr hdr;
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struct psc_entry entries[VMGEXIT_PSC_MAX_ENTRY];
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} __packed;
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#define GHCB_MSR_TERM_REQ 0x100
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#define GHCB_MSR_TERM_REASON_SET_POS 12
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#define GHCB_MSR_TERM_REASON_SET_MASK 0xf
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#define GHCB_MSR_TERM_REASON_POS 16
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#define GHCB_MSR_TERM_REASON_MASK 0xff
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#define GHCB_SEV_TERM_REASON(reason_set, reason_val) \
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/* GHCBData[15:12] */ \
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(((((u64)reason_set) & 0xf) << 12) | \
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/* GHCBData[23:16] */ \
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((((u64)reason_val) & 0xff) << 16))
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/* Error codes from reason set 0 */
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#define SEV_TERM_SET_GEN 0
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#define GHCB_SEV_ES_GEN_REQ 0
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#define GHCB_SEV_ES_PROT_UNSUPPORTED 1
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#define GHCB_SNP_UNSUPPORTED 2
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/* Linux-specific reason codes (used with reason set 1) */
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#define SEV_TERM_SET_LINUX 1
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#define GHCB_TERM_REGISTER 0 /* GHCB GPA registration failure */
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#define GHCB_TERM_PSC 1 /* Page State Change failure */
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#define GHCB_TERM_PVALIDATE 2 /* Pvalidate failure */
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#define GHCB_TERM_NOT_VMPL0 3 /* SNP guest is not running at VMPL-0 */
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#define GHCB_TERM_CPUID 4 /* CPUID-validation failure */
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#define GHCB_TERM_CPUID_HV 5 /* CPUID failure during hypervisor fallback */
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#define GHCB_RESP_CODE(v) ((v) & GHCB_MSR_INFO_MASK)
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/*
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* Error codes related to GHCB input that can be communicated back to the guest
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* by setting the lower 32-bits of the GHCB SW_EXITINFO1 field to 2.
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*/
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#define GHCB_ERR_NOT_REGISTERED 1
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#define GHCB_ERR_INVALID_USAGE 2
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#define GHCB_ERR_INVALID_SCRATCH_AREA 3
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#define GHCB_ERR_MISSING_INPUT 4
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#define GHCB_ERR_INVALID_INPUT 5
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#define GHCB_ERR_INVALID_EVENT 6
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#endif
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