mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 05:48:40 +00:00
![Raghav Dogra](/assets/img/avatar_default.png)
This patch enables IFC NAND support on ARM layerscape platform. It fixes the dependency to enable NAND. The include files are being modified to ensure complilation for both PowerPC and ARM architectures. Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
129 lines
4.2 KiB
Text
129 lines
4.2 KiB
Text
#
|
|
# Memory devices
|
|
#
|
|
|
|
menuconfig MEMORY
|
|
bool "Memory Controller drivers"
|
|
|
|
if MEMORY
|
|
|
|
config ARM_PL172_MPMC
|
|
tristate "ARM PL172 MPMC driver"
|
|
depends on ARM_AMBA && OF
|
|
help
|
|
This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
|
|
If you have an embedded system with an AMBA bus and a PL172
|
|
controller, say Y or M here.
|
|
|
|
config ATMEL_SDRAMC
|
|
bool "Atmel (Multi-port DDR-)SDRAM Controller"
|
|
default y
|
|
depends on ARCH_AT91 && OF
|
|
help
|
|
This driver is for Atmel SDRAM Controller or Atmel Multi-port
|
|
DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
|
|
Starting with the at91sam9g45, this controller supports SDR, DDR and
|
|
LP-DDR memories.
|
|
|
|
config TI_AEMIF
|
|
tristate "Texas Instruments AEMIF driver"
|
|
depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
|
|
help
|
|
This driver is for the AEMIF module available in Texas Instruments
|
|
SoCs. AEMIF stands for Asynchronous External Memory Interface and
|
|
is intended to provide a glue-less interface to a variety of
|
|
asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
|
|
of 256M bytes of any of these memories can be accessed at a given
|
|
time via four chip selects with 64M byte access per chip select.
|
|
|
|
config TI_EMIF
|
|
tristate "Texas Instruments EMIF driver"
|
|
depends on ARCH_OMAP2PLUS
|
|
select DDR
|
|
help
|
|
This driver is for the EMIF module available in Texas Instruments
|
|
SoCs. EMIF is an SDRAM controller that, based on its revision,
|
|
supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
|
|
This driver takes care of only LPDDR2 memories presently. The
|
|
functions of the driver includes re-configuring AC timing
|
|
parameters and other settings during frequency, voltage and
|
|
temperature changes
|
|
|
|
config OMAP_GPMC
|
|
bool
|
|
select GPIOLIB
|
|
help
|
|
This driver is for the General Purpose Memory Controller (GPMC)
|
|
present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
|
|
interfacing to a variety of asynchronous as well as synchronous
|
|
memory drives like NOR, NAND, OneNAND, SRAM.
|
|
|
|
config OMAP_GPMC_DEBUG
|
|
bool "Enable GPMC debug output and skip reset of GPMC during init"
|
|
depends on OMAP_GPMC
|
|
help
|
|
Enables verbose debugging mostly to decode the bootloader provided
|
|
timings. To preserve the bootloader provided timings, the reset
|
|
of GPMC is skipped during init. Enable this during development to
|
|
configure devices connected to the GPMC bus.
|
|
|
|
NOTE: In addition to matching the register setup with the bootloader
|
|
you also need to match the GPMC FCLK frequency used by the
|
|
bootloader or else the GPMC timings won't be identical with the
|
|
bootloader timings.
|
|
|
|
config MVEBU_DEVBUS
|
|
bool "Marvell EBU Device Bus Controller"
|
|
default y
|
|
depends on PLAT_ORION && OF
|
|
help
|
|
This driver is for the Device Bus controller available in some
|
|
Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
|
|
Armada 370 and Armada XP. This controller allows to handle flash
|
|
devices such as NOR, NAND, SRAM, and FPGA.
|
|
|
|
config TEGRA20_MC
|
|
bool "Tegra20 Memory Controller(MC) driver"
|
|
default y
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
help
|
|
This driver is for the Memory Controller(MC) module available
|
|
in Tegra20 SoCs, mainly for a address translation fault
|
|
analysis, especially for IOMMU/GART(Graphics Address
|
|
Relocation Table) module.
|
|
|
|
config FSL_CORENET_CF
|
|
tristate "Freescale CoreNet Error Reporting"
|
|
depends on FSL_SOC_BOOKE
|
|
help
|
|
Say Y for reporting of errors from the Freescale CoreNet
|
|
Coherency Fabric. Errors reported include accesses to
|
|
physical addresses that mapped by no local access window
|
|
(LAW) or an invalid LAW, as well as bad cache state that
|
|
represents a coherency violation.
|
|
|
|
config FSL_IFC
|
|
bool
|
|
depends on FSL_SOC || ARCH_LAYERSCAPE
|
|
|
|
config JZ4780_NEMC
|
|
bool "Ingenic JZ4780 SoC NEMC driver"
|
|
default y
|
|
depends on MACH_JZ4780
|
|
help
|
|
This driver is for the NAND/External Memory Controller (NEMC) in
|
|
the Ingenic JZ4780. This controller is used to handle external
|
|
memory devices such as NAND and SRAM.
|
|
|
|
config MTK_SMI
|
|
bool
|
|
depends on ARCH_MEDIATEK || COMPILE_TEST
|
|
help
|
|
This driver is for the Memory Controller module in MediaTek SoCs,
|
|
mainly help enable/disable iommu and control the power domain and
|
|
clocks for each local arbiter.
|
|
|
|
source "drivers/memory/samsung/Kconfig"
|
|
source "drivers/memory/tegra/Kconfig"
|
|
|
|
endif
|