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8d20a541b0
Patches to support SMP. * Each CPU has its own current_pgd. * flush_tlb_range is implemented as flush_tlb_mm. * Atomic operations implemented with spinlocks. * Semaphores implemented with spinlocks. Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
24 lines
741 B
C
24 lines
741 B
C
#ifndef __CRIS_MMU_CONTEXT_H
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#define __CRIS_MMU_CONTEXT_H
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extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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extern void get_mmu_context(struct mm_struct *mm);
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extern void destroy_context(struct mm_struct *mm);
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extern void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk);
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#define deactivate_mm(tsk,mm) do { } while (0)
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#define activate_mm(prev,next) switch_mm((prev),(next),NULL)
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/* current active pgd - this is similar to other processors pgd
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* registers like cr3 on the i386
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*/
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extern volatile DEFINE_PER_CPU(pgd_t *,current_pgd); /* defined in arch/cris/mm/fault.c */
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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#endif
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