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9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 lines
403 B
C
18 lines
403 B
C
/*
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* include/asm-xtensa/hw_irq.h
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*
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* Copyright (C) 2002 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_HW_IRQ_H
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#define _XTENSA_HW_IRQ_H
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static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
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{
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}
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#endif
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