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![Mathias Kresin](/assets/img/avatar_default.png)
While doing a global software reset, these bits are not cleared and let
some bootloader fail to initialise the GPHYs. The bootloader don't
expect the GPHYs in reset, as they aren't during power on.
The asserts were a workaround for a wrong syscon-reboot mask. With a
mask set which includes the GPHY resets, these resets aren't required
any more.
Fixes: 126534141b
("MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd")
Signed-off-by: Mathias Kresin <dev@kresin.me>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.14+
Patchwork: https://patchwork.linux-mips.org/patch/19003/
[jhogan@kernel.org: Fix build warnings]
Signed-off-by: James Hogan <jhogan@kernel.org>
224 lines
5.8 KiB
C
224 lines
5.8 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2012 John Crispin <blogic@phrozen.org>
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* Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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* Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/firmware.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/reboot.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/property.h>
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#include <dt-bindings/mips/lantiq_rcu_gphy.h>
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#include <lantiq_soc.h>
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#define XRX200_GPHY_FW_ALIGN (16 * 1024)
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struct xway_gphy_priv {
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struct clk *gphy_clk_gate;
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struct reset_control *gphy_reset;
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struct reset_control *gphy_reset2;
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void __iomem *membase;
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char *fw_name;
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};
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struct xway_gphy_match_data {
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char *fe_firmware_name;
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char *ge_firmware_name;
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};
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static const struct xway_gphy_match_data xrx200a1x_gphy_data = {
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.fe_firmware_name = "lantiq/xrx200_phy22f_a14.bin",
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.ge_firmware_name = "lantiq/xrx200_phy11g_a14.bin",
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};
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static const struct xway_gphy_match_data xrx200a2x_gphy_data = {
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.fe_firmware_name = "lantiq/xrx200_phy22f_a22.bin",
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.ge_firmware_name = "lantiq/xrx200_phy11g_a22.bin",
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};
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static const struct xway_gphy_match_data xrx300_gphy_data = {
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.fe_firmware_name = "lantiq/xrx300_phy22f_a21.bin",
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.ge_firmware_name = "lantiq/xrx300_phy11g_a21.bin",
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};
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static const struct of_device_id xway_gphy_match[] = {
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{ .compatible = "lantiq,xrx200a1x-gphy", .data = &xrx200a1x_gphy_data },
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{ .compatible = "lantiq,xrx200a2x-gphy", .data = &xrx200a2x_gphy_data },
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{ .compatible = "lantiq,xrx300-gphy", .data = &xrx300_gphy_data },
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{ .compatible = "lantiq,xrx330-gphy", .data = &xrx300_gphy_data },
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{},
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};
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MODULE_DEVICE_TABLE(of, xway_gphy_match);
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static int xway_gphy_load(struct device *dev, struct xway_gphy_priv *priv,
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dma_addr_t *dev_addr)
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{
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const struct firmware *fw;
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void *fw_addr;
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dma_addr_t dma_addr;
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size_t size;
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int ret;
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ret = request_firmware(&fw, priv->fw_name, dev);
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if (ret) {
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dev_err(dev, "failed to load firmware: %s, error: %i\n",
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priv->fw_name, ret);
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return ret;
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}
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/*
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* GPHY cores need the firmware code in a persistent and contiguous
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* memory area with a 16 kB boundary aligned start address.
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*/
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size = fw->size + XRX200_GPHY_FW_ALIGN;
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fw_addr = dmam_alloc_coherent(dev, size, &dma_addr, GFP_KERNEL);
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if (fw_addr) {
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fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN);
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*dev_addr = ALIGN(dma_addr, XRX200_GPHY_FW_ALIGN);
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memcpy(fw_addr, fw->data, fw->size);
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} else {
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dev_err(dev, "failed to alloc firmware memory\n");
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ret = -ENOMEM;
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}
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release_firmware(fw);
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return ret;
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}
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static int xway_gphy_of_probe(struct platform_device *pdev,
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struct xway_gphy_priv *priv)
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{
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struct device *dev = &pdev->dev;
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const struct xway_gphy_match_data *gphy_fw_name_cfg;
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u32 gphy_mode;
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int ret;
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struct resource *res_gphy;
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gphy_fw_name_cfg = of_device_get_match_data(dev);
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priv->gphy_clk_gate = devm_clk_get(dev, NULL);
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if (IS_ERR(priv->gphy_clk_gate)) {
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dev_err(dev, "Failed to lookup gate clock\n");
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return PTR_ERR(priv->gphy_clk_gate);
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}
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res_gphy = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->membase = devm_ioremap_resource(dev, res_gphy);
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if (IS_ERR(priv->membase))
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return PTR_ERR(priv->membase);
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priv->gphy_reset = devm_reset_control_get(dev, "gphy");
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if (IS_ERR(priv->gphy_reset)) {
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if (PTR_ERR(priv->gphy_reset) != -EPROBE_DEFER)
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dev_err(dev, "Failed to lookup gphy reset\n");
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return PTR_ERR(priv->gphy_reset);
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}
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priv->gphy_reset2 = devm_reset_control_get_optional(dev, "gphy2");
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if (IS_ERR(priv->gphy_reset2))
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return PTR_ERR(priv->gphy_reset2);
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ret = device_property_read_u32(dev, "lantiq,gphy-mode", &gphy_mode);
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/* Default to GE mode */
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if (ret)
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gphy_mode = GPHY_MODE_GE;
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switch (gphy_mode) {
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case GPHY_MODE_FE:
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priv->fw_name = gphy_fw_name_cfg->fe_firmware_name;
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break;
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case GPHY_MODE_GE:
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priv->fw_name = gphy_fw_name_cfg->ge_firmware_name;
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break;
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default:
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dev_err(dev, "Unknown GPHY mode %d\n", gphy_mode);
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return -EINVAL;
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}
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return 0;
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}
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static int xway_gphy_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct xway_gphy_priv *priv;
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dma_addr_t fw_addr = 0;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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ret = xway_gphy_of_probe(pdev, priv);
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if (ret)
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return ret;
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ret = clk_prepare_enable(priv->gphy_clk_gate);
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if (ret)
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return ret;
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ret = xway_gphy_load(dev, priv, &fw_addr);
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if (ret) {
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clk_disable_unprepare(priv->gphy_clk_gate);
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return ret;
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}
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reset_control_assert(priv->gphy_reset);
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reset_control_assert(priv->gphy_reset2);
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iowrite32be(fw_addr, priv->membase);
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reset_control_deassert(priv->gphy_reset);
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reset_control_deassert(priv->gphy_reset2);
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platform_set_drvdata(pdev, priv);
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return ret;
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}
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static int xway_gphy_remove(struct platform_device *pdev)
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{
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struct xway_gphy_priv *priv = platform_get_drvdata(pdev);
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iowrite32be(0, priv->membase);
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clk_disable_unprepare(priv->gphy_clk_gate);
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return 0;
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}
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static struct platform_driver xway_gphy_driver = {
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.probe = xway_gphy_probe,
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.remove = xway_gphy_remove,
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.driver = {
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.name = "xway-rcu-gphy",
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.of_match_table = xway_gphy_match,
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},
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};
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module_platform_driver(xway_gphy_driver);
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MODULE_FIRMWARE("lantiq/xrx300_phy11g_a21.bin");
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MODULE_FIRMWARE("lantiq/xrx300_phy22f_a21.bin");
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MODULE_FIRMWARE("lantiq/xrx200_phy11g_a14.bin");
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MODULE_FIRMWARE("lantiq/xrx200_phy11g_a22.bin");
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MODULE_FIRMWARE("lantiq/xrx200_phy22f_a14.bin");
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MODULE_FIRMWARE("lantiq/xrx200_phy22f_a22.bin");
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MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>");
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MODULE_DESCRIPTION("Lantiq XWAY GPHY Firmware Loader");
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MODULE_LICENSE("GPL");
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