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![Bin Liu](/assets/img/avatar_default.png)
TI AM335x CPPI 4.1 module uses a single register bit for CPPI interrupts
in both musb controllers. So disabling the CPPI irq in one musb driver
breaks the other musb module.
Since musb is already disabled before tearing down dma controller in
musb_remove(), it is safe to not disable CPPI irq in
musb_dma_controller_destroy().
Fixes: 255348289f
("usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS")
Cc: stable@vger.kernel.org
Signed-off-by: Bin Liu <b-liu@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1039 lines
26 KiB
C
1039 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments DSPS platforms "glue layer"
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*
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* Copyright (C) 2012, by Texas Instruments
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*
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* Based on the am35x "glue layer" code.
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*
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* This file is part of the Inventra Controller Driver for Linux.
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*
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* musb_dsps.c will be a common file for all the TI DSPS platforms
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* such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
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* For now only ti81x is using this and in future davinci.c, am35x.c
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* da8xx.c would be merged to this file after testing.
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*/
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/module.h>
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#include <linux/usb/usb_phy_generic.h>
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#include <linux/platform_data/usb-omap.h>
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#include <linux/sizes.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/usb/of.h>
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#include <linux/debugfs.h>
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#include "musb_core.h"
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static const struct of_device_id musb_dsps_of_match[];
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/**
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* DSPS musb wrapper register offset.
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* FIXME: This should be expanded to have all the wrapper registers from TI DSPS
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* musb ips.
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*/
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struct dsps_musb_wrapper {
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u16 revision;
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u16 control;
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u16 status;
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u16 epintr_set;
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u16 epintr_clear;
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u16 epintr_status;
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u16 coreintr_set;
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u16 coreintr_clear;
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u16 coreintr_status;
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u16 phy_utmi;
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u16 mode;
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u16 tx_mode;
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u16 rx_mode;
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/* bit positions for control */
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unsigned reset:5;
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/* bit positions for interrupt */
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unsigned usb_shift:5;
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u32 usb_mask;
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u32 usb_bitmap;
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unsigned drvvbus:5;
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unsigned txep_shift:5;
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u32 txep_mask;
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u32 txep_bitmap;
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unsigned rxep_shift:5;
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u32 rxep_mask;
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u32 rxep_bitmap;
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/* bit positions for phy_utmi */
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unsigned otg_disable:5;
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/* bit positions for mode */
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unsigned iddig:5;
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unsigned iddig_mux:5;
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/* miscellaneous stuff */
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unsigned poll_timeout;
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};
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/*
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* register shadow for suspend
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*/
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struct dsps_context {
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u32 control;
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u32 epintr;
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u32 coreintr;
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u32 phy_utmi;
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u32 mode;
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u32 tx_mode;
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u32 rx_mode;
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};
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/**
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* DSPS glue structure.
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*/
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struct dsps_glue {
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struct device *dev;
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struct platform_device *musb; /* child musb pdev */
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const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
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int vbus_irq; /* optional vbus irq */
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unsigned long last_timer; /* last timer data for each instance */
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bool sw_babble_enabled;
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void __iomem *usbss_base;
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struct dsps_context context;
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struct debugfs_regset32 regset;
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struct dentry *dbgfs_root;
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};
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static const struct debugfs_reg32 dsps_musb_regs[] = {
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{ "revision", 0x00 },
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{ "control", 0x14 },
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{ "status", 0x18 },
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{ "eoi", 0x24 },
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{ "intr0_stat", 0x30 },
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{ "intr1_stat", 0x34 },
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{ "intr0_set", 0x38 },
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{ "intr1_set", 0x3c },
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{ "txmode", 0x70 },
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{ "rxmode", 0x74 },
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{ "autoreq", 0xd0 },
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{ "srpfixtime", 0xd4 },
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{ "tdown", 0xd8 },
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{ "phy_utmi", 0xe0 },
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{ "mode", 0xe8 },
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};
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static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
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{
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struct musb *musb = platform_get_drvdata(glue->musb);
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int wait;
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if (wait_ms < 0)
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wait = msecs_to_jiffies(glue->wrp->poll_timeout);
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else
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wait = msecs_to_jiffies(wait_ms);
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mod_timer(&musb->dev_timer, jiffies + wait);
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}
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/*
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* If no vbus irq from the PMIC is configured, we need to poll VBUS status.
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*/
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static void dsps_mod_timer_optional(struct dsps_glue *glue)
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{
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if (glue->vbus_irq)
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return;
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dsps_mod_timer(glue, -1);
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}
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/* USBSS / USB AM335x */
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#define USBSS_IRQ_STATUS 0x28
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#define USBSS_IRQ_ENABLER 0x2c
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#define USBSS_IRQ_CLEARR 0x30
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#define USBSS_IRQ_PD_COMP (1 << 2)
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/**
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* dsps_musb_enable - enable interrupts
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*/
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static void dsps_musb_enable(struct musb *musb)
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{
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struct device *dev = musb->controller;
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struct platform_device *pdev = to_platform_device(dev->parent);
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struct dsps_glue *glue = platform_get_drvdata(pdev);
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const struct dsps_musb_wrapper *wrp = glue->wrp;
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void __iomem *reg_base = musb->ctrl_base;
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u32 epmask, coremask;
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/* Workaround: setup IRQs through both register sets. */
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epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
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((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
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coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
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musb_writel(reg_base, wrp->epintr_set, epmask);
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musb_writel(reg_base, wrp->coreintr_set, coremask);
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/* start polling for ID change in dual-role idle mode */
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if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
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musb->port_mode == MUSB_OTG)
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dsps_mod_timer(glue, -1);
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}
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/**
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* dsps_musb_disable - disable HDRC and flush interrupts
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*/
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static void dsps_musb_disable(struct musb *musb)
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{
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struct device *dev = musb->controller;
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struct platform_device *pdev = to_platform_device(dev->parent);
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struct dsps_glue *glue = platform_get_drvdata(pdev);
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const struct dsps_musb_wrapper *wrp = glue->wrp;
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void __iomem *reg_base = musb->ctrl_base;
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musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
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musb_writel(reg_base, wrp->epintr_clear,
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wrp->txep_bitmap | wrp->rxep_bitmap);
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del_timer_sync(&musb->dev_timer);
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}
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/* Caller must take musb->lock */
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static int dsps_check_status(struct musb *musb, void *unused)
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{
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void __iomem *mregs = musb->mregs;
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struct device *dev = musb->controller;
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struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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const struct dsps_musb_wrapper *wrp = glue->wrp;
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u8 devctl;
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int skip_session = 0;
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if (glue->vbus_irq)
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del_timer(&musb->dev_timer);
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/*
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* We poll because DSPS IP's won't expose several OTG-critical
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* status change events (from the transceiver) otherwise.
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*/
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devctl = musb_readb(mregs, MUSB_DEVCTL);
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dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
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usb_otg_state_string(musb->xceiv->otg->state));
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switch (musb->xceiv->otg->state) {
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case OTG_STATE_A_WAIT_VRISE:
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dsps_mod_timer_optional(glue);
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break;
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case OTG_STATE_A_WAIT_BCON:
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/* keep VBUS on for host-only mode */
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if (musb->port_mode == MUSB_HOST) {
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dsps_mod_timer_optional(glue);
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break;
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}
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musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
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skip_session = 1;
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/* fall through */
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case OTG_STATE_A_IDLE:
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case OTG_STATE_B_IDLE:
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if (!glue->vbus_irq) {
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if (devctl & MUSB_DEVCTL_BDEVICE) {
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musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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MUSB_DEV_MODE(musb);
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} else {
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musb->xceiv->otg->state = OTG_STATE_A_IDLE;
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MUSB_HST_MODE(musb);
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}
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if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
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musb_writeb(mregs, MUSB_DEVCTL,
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MUSB_DEVCTL_SESSION);
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}
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dsps_mod_timer_optional(glue);
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break;
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case OTG_STATE_A_WAIT_VFALL:
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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musb_writel(musb->ctrl_base, wrp->coreintr_set,
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MUSB_INTR_VBUSERROR << wrp->usb_shift);
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break;
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default:
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break;
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}
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return 0;
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}
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static void otg_timer(struct timer_list *t)
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{
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struct musb *musb = from_timer(musb, t, dev_timer);
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struct device *dev = musb->controller;
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unsigned long flags;
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int err;
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err = pm_runtime_get(dev);
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if ((err != -EINPROGRESS) && err < 0) {
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dev_err(dev, "Poll could not pm_runtime_get: %i\n", err);
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pm_runtime_put_noidle(dev);
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return;
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}
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spin_lock_irqsave(&musb->lock, flags);
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err = musb_queue_resume_work(musb, dsps_check_status, NULL);
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if (err < 0)
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dev_err(dev, "%s resume work: %i\n", __func__, err);
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spin_unlock_irqrestore(&musb->lock, flags);
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pm_runtime_mark_last_busy(dev);
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pm_runtime_put_autosuspend(dev);
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}
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static void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum)
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{
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u32 epintr;
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struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
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const struct dsps_musb_wrapper *wrp = glue->wrp;
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/* musb->lock might already been held */
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epintr = (1 << epnum) << wrp->rxep_shift;
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musb_writel(musb->ctrl_base, wrp->epintr_status, epintr);
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}
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static irqreturn_t dsps_interrupt(int irq, void *hci)
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{
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struct musb *musb = hci;
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void __iomem *reg_base = musb->ctrl_base;
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struct device *dev = musb->controller;
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struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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const struct dsps_musb_wrapper *wrp = glue->wrp;
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unsigned long flags;
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irqreturn_t ret = IRQ_NONE;
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u32 epintr, usbintr;
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spin_lock_irqsave(&musb->lock, flags);
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/* Get endpoint interrupts */
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epintr = musb_readl(reg_base, wrp->epintr_status);
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musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
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musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
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if (epintr)
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musb_writel(reg_base, wrp->epintr_status, epintr);
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/* Get usb core interrupts */
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usbintr = musb_readl(reg_base, wrp->coreintr_status);
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if (!usbintr && !epintr)
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goto out;
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musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
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if (usbintr)
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musb_writel(reg_base, wrp->coreintr_status, usbintr);
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dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
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usbintr, epintr);
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if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
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int drvvbus = musb_readl(reg_base, wrp->status);
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void __iomem *mregs = musb->mregs;
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u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
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int err;
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err = musb->int_usb & MUSB_INTR_VBUSERROR;
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if (err) {
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/*
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* The Mentor core doesn't debounce VBUS as needed
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* to cope with device connect current spikes. This
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* means it's not uncommon for bus-powered devices
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* to get VBUS errors during enumeration.
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*
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* This is a workaround, but newer RTL from Mentor
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* seems to allow a better one: "re"-starting sessions
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* without waiting for VBUS to stop registering in
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* devctl.
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*/
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musb->int_usb &= ~MUSB_INTR_VBUSERROR;
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
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dsps_mod_timer_optional(glue);
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WARNING("VBUS error workaround (delay coming)\n");
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} else if (drvvbus) {
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MUSB_HST_MODE(musb);
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musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
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dsps_mod_timer_optional(glue);
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} else {
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musb->is_active = 0;
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MUSB_DEV_MODE(musb);
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musb->xceiv->otg->state = OTG_STATE_B_IDLE;
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}
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/* NOTE: this must complete power-on within 100 ms. */
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dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
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drvvbus ? "on" : "off",
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usb_otg_state_string(musb->xceiv->otg->state),
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err ? " ERROR" : "",
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devctl);
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ret = IRQ_HANDLED;
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}
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if (musb->int_tx || musb->int_rx || musb->int_usb)
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ret |= musb_interrupt(musb);
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/* Poll for ID change and connect */
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switch (musb->xceiv->otg->state) {
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case OTG_STATE_B_IDLE:
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case OTG_STATE_A_WAIT_BCON:
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dsps_mod_timer_optional(glue);
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break;
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default:
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break;
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}
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out:
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spin_unlock_irqrestore(&musb->lock, flags);
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return ret;
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}
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static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
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{
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struct dentry *root;
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char buf[128];
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sprintf(buf, "%s.dsps", dev_name(musb->controller));
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root = debugfs_create_dir(buf, NULL);
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glue->dbgfs_root = root;
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glue->regset.regs = dsps_musb_regs;
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glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
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glue->regset.base = musb->ctrl_base;
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debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
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return 0;
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}
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static int dsps_musb_init(struct musb *musb)
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{
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struct device *dev = musb->controller;
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struct dsps_glue *glue = dev_get_drvdata(dev->parent);
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struct platform_device *parent = to_platform_device(dev->parent);
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const struct dsps_musb_wrapper *wrp = glue->wrp;
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void __iomem *reg_base;
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struct resource *r;
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u32 rev, val;
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int ret;
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r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
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reg_base = devm_ioremap_resource(dev, r);
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if (IS_ERR(reg_base))
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return PTR_ERR(reg_base);
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musb->ctrl_base = reg_base;
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/* NOP driver needs change if supporting dual instance */
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musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
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if (IS_ERR(musb->xceiv))
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return PTR_ERR(musb->xceiv);
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musb->phy = devm_phy_get(dev->parent, "usb2-phy");
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/* Returns zero if e.g. not clocked */
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rev = musb_readl(reg_base, wrp->revision);
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if (!rev)
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return -ENODEV;
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if (IS_ERR(musb->phy)) {
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musb->phy = NULL;
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} else {
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ret = phy_init(musb->phy);
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if (ret < 0)
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return ret;
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ret = phy_power_on(musb->phy);
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if (ret) {
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phy_exit(musb->phy);
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return ret;
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}
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}
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timer_setup(&musb->dev_timer, otg_timer, 0);
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/* Reset the musb */
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musb_writel(reg_base, wrp->control, (1 << wrp->reset));
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musb->isr = dsps_interrupt;
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/* reset the otgdisable bit, needed for host mode to work */
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val = musb_readl(reg_base, wrp->phy_utmi);
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val &= ~(1 << wrp->otg_disable);
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musb_writel(musb->ctrl_base, wrp->phy_utmi, val);
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/*
|
|
* Check whether the dsps version has babble control enabled.
|
|
* In latest silicon revision the babble control logic is enabled.
|
|
* If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
|
|
* logic enabled.
|
|
*/
|
|
val = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
|
|
if (val & MUSB_BABBLE_RCV_DISABLE) {
|
|
glue->sw_babble_enabled = true;
|
|
val |= MUSB_BABBLE_SW_SESSION_CTRL;
|
|
musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
|
|
}
|
|
|
|
dsps_mod_timer(glue, -1);
|
|
|
|
return dsps_musb_dbg_init(musb, glue);
|
|
}
|
|
|
|
static int dsps_musb_exit(struct musb *musb)
|
|
{
|
|
struct device *dev = musb->controller;
|
|
struct dsps_glue *glue = dev_get_drvdata(dev->parent);
|
|
|
|
del_timer_sync(&musb->dev_timer);
|
|
phy_power_off(musb->phy);
|
|
phy_exit(musb->phy);
|
|
debugfs_remove_recursive(glue->dbgfs_root);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dsps_musb_set_mode(struct musb *musb, u8 mode)
|
|
{
|
|
struct device *dev = musb->controller;
|
|
struct dsps_glue *glue = dev_get_drvdata(dev->parent);
|
|
const struct dsps_musb_wrapper *wrp = glue->wrp;
|
|
void __iomem *ctrl_base = musb->ctrl_base;
|
|
u32 reg;
|
|
|
|
reg = musb_readl(ctrl_base, wrp->mode);
|
|
|
|
switch (mode) {
|
|
case MUSB_HOST:
|
|
reg &= ~(1 << wrp->iddig);
|
|
|
|
/*
|
|
* if we're setting mode to host-only or device-only, we're
|
|
* going to ignore whatever the PHY sends us and just force
|
|
* ID pin status by SW
|
|
*/
|
|
reg |= (1 << wrp->iddig_mux);
|
|
|
|
musb_writel(ctrl_base, wrp->mode, reg);
|
|
musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
|
|
break;
|
|
case MUSB_PERIPHERAL:
|
|
reg |= (1 << wrp->iddig);
|
|
|
|
/*
|
|
* if we're setting mode to host-only or device-only, we're
|
|
* going to ignore whatever the PHY sends us and just force
|
|
* ID pin status by SW
|
|
*/
|
|
reg |= (1 << wrp->iddig_mux);
|
|
|
|
musb_writel(ctrl_base, wrp->mode, reg);
|
|
break;
|
|
case MUSB_OTG:
|
|
musb_writel(ctrl_base, wrp->phy_utmi, 0x02);
|
|
break;
|
|
default:
|
|
dev_err(glue->dev, "unsupported mode %d\n", mode);
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool dsps_sw_babble_control(struct musb *musb)
|
|
{
|
|
u8 babble_ctl;
|
|
bool session_restart = false;
|
|
|
|
babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
|
|
dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
|
|
babble_ctl);
|
|
/*
|
|
* check line monitor flag to check whether babble is
|
|
* due to noise
|
|
*/
|
|
dev_dbg(musb->controller, "STUCK_J is %s\n",
|
|
babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
|
|
|
|
if (babble_ctl & MUSB_BABBLE_STUCK_J) {
|
|
int timeout = 10;
|
|
|
|
/*
|
|
* babble is due to noise, then set transmit idle (d7 bit)
|
|
* to resume normal operation
|
|
*/
|
|
babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
|
|
babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
|
|
musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
|
|
|
|
/* wait till line monitor flag cleared */
|
|
dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
|
|
do {
|
|
babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL);
|
|
udelay(1);
|
|
} while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
|
|
|
|
/* check whether stuck_at_j bit cleared */
|
|
if (babble_ctl & MUSB_BABBLE_STUCK_J) {
|
|
/*
|
|
* real babble condition has occurred
|
|
* restart the controller to start the
|
|
* session again
|
|
*/
|
|
dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
|
|
babble_ctl);
|
|
session_restart = true;
|
|
}
|
|
} else {
|
|
session_restart = true;
|
|
}
|
|
|
|
return session_restart;
|
|
}
|
|
|
|
static int dsps_musb_recover(struct musb *musb)
|
|
{
|
|
struct device *dev = musb->controller;
|
|
struct dsps_glue *glue = dev_get_drvdata(dev->parent);
|
|
int session_restart = 0;
|
|
|
|
if (glue->sw_babble_enabled)
|
|
session_restart = dsps_sw_babble_control(musb);
|
|
else
|
|
session_restart = 1;
|
|
|
|
return session_restart ? 0 : -EPIPE;
|
|
}
|
|
|
|
/* Similar to am35x, dm81xx support only 32-bit read operation */
|
|
static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
|
|
{
|
|
void __iomem *fifo = hw_ep->fifo;
|
|
|
|
if (len >= 4) {
|
|
ioread32_rep(fifo, dst, len >> 2);
|
|
dst += len & ~0x03;
|
|
len &= 0x03;
|
|
}
|
|
|
|
/* Read any remaining 1 to 3 bytes */
|
|
if (len > 0) {
|
|
u32 val = musb_readl(fifo, 0);
|
|
memcpy(dst, &val, len);
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_USB_TI_CPPI41_DMA
|
|
static void dsps_dma_controller_callback(struct dma_controller *c)
|
|
{
|
|
struct musb *musb = c->musb;
|
|
struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
|
|
void __iomem *usbss_base = glue->usbss_base;
|
|
u32 status;
|
|
|
|
status = musb_readl(usbss_base, USBSS_IRQ_STATUS);
|
|
if (status & USBSS_IRQ_PD_COMP)
|
|
musb_writel(usbss_base, USBSS_IRQ_STATUS, USBSS_IRQ_PD_COMP);
|
|
}
|
|
|
|
static struct dma_controller *
|
|
dsps_dma_controller_create(struct musb *musb, void __iomem *base)
|
|
{
|
|
struct dma_controller *controller;
|
|
struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
|
|
void __iomem *usbss_base = glue->usbss_base;
|
|
|
|
controller = cppi41_dma_controller_create(musb, base);
|
|
if (IS_ERR_OR_NULL(controller))
|
|
return controller;
|
|
|
|
musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
|
|
controller->dma_callback = dsps_dma_controller_callback;
|
|
|
|
return controller;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static void dsps_dma_controller_suspend(struct dsps_glue *glue)
|
|
{
|
|
void __iomem *usbss_base = glue->usbss_base;
|
|
|
|
musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
|
|
}
|
|
|
|
static void dsps_dma_controller_resume(struct dsps_glue *glue)
|
|
{
|
|
void __iomem *usbss_base = glue->usbss_base;
|
|
|
|
musb_writel(usbss_base, USBSS_IRQ_ENABLER, USBSS_IRQ_PD_COMP);
|
|
}
|
|
#endif
|
|
#else /* CONFIG_USB_TI_CPPI41_DMA */
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static void dsps_dma_controller_suspend(struct dsps_glue *glue) {}
|
|
static void dsps_dma_controller_resume(struct dsps_glue *glue) {}
|
|
#endif
|
|
#endif /* CONFIG_USB_TI_CPPI41_DMA */
|
|
|
|
static struct musb_platform_ops dsps_ops = {
|
|
.quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
|
|
.init = dsps_musb_init,
|
|
.exit = dsps_musb_exit,
|
|
|
|
#ifdef CONFIG_USB_TI_CPPI41_DMA
|
|
.dma_init = dsps_dma_controller_create,
|
|
.dma_exit = cppi41_dma_controller_destroy,
|
|
#endif
|
|
.enable = dsps_musb_enable,
|
|
.disable = dsps_musb_disable,
|
|
|
|
.set_mode = dsps_musb_set_mode,
|
|
.recover = dsps_musb_recover,
|
|
.clear_ep_rxintr = dsps_musb_clear_ep_rxintr,
|
|
};
|
|
|
|
static u64 musb_dmamask = DMA_BIT_MASK(32);
|
|
|
|
static int get_int_prop(struct device_node *dn, const char *s)
|
|
{
|
|
int ret;
|
|
u32 val;
|
|
|
|
ret = of_property_read_u32(dn, s, &val);
|
|
if (ret)
|
|
return 0;
|
|
return val;
|
|
}
|
|
|
|
static int dsps_create_musb_pdev(struct dsps_glue *glue,
|
|
struct platform_device *parent)
|
|
{
|
|
struct musb_hdrc_platform_data pdata;
|
|
struct resource resources[2];
|
|
struct resource *res;
|
|
struct device *dev = &parent->dev;
|
|
struct musb_hdrc_config *config;
|
|
struct platform_device *musb;
|
|
struct device_node *dn = parent->dev.of_node;
|
|
int ret, val;
|
|
|
|
memset(resources, 0, sizeof(resources));
|
|
res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
|
|
if (!res) {
|
|
dev_err(dev, "failed to get memory.\n");
|
|
return -EINVAL;
|
|
}
|
|
resources[0] = *res;
|
|
|
|
res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
|
|
if (!res) {
|
|
dev_err(dev, "failed to get irq.\n");
|
|
return -EINVAL;
|
|
}
|
|
resources[1] = *res;
|
|
|
|
/* allocate the child platform device */
|
|
musb = platform_device_alloc("musb-hdrc",
|
|
(resources[0].start & 0xFFF) == 0x400 ? 0 : 1);
|
|
if (!musb) {
|
|
dev_err(dev, "failed to allocate musb device\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
musb->dev.parent = dev;
|
|
musb->dev.dma_mask = &musb_dmamask;
|
|
musb->dev.coherent_dma_mask = musb_dmamask;
|
|
device_set_of_node_from_dev(&musb->dev, &parent->dev);
|
|
|
|
glue->musb = musb;
|
|
|
|
ret = platform_device_add_resources(musb, resources,
|
|
ARRAY_SIZE(resources));
|
|
if (ret) {
|
|
dev_err(dev, "failed to add resources\n");
|
|
goto err;
|
|
}
|
|
|
|
config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
|
|
if (!config) {
|
|
ret = -ENOMEM;
|
|
goto err;
|
|
}
|
|
pdata.config = config;
|
|
pdata.platform_ops = &dsps_ops;
|
|
|
|
config->num_eps = get_int_prop(dn, "mentor,num-eps");
|
|
config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
|
|
config->host_port_deassert_reset_at_resume = 1;
|
|
pdata.mode = musb_get_mode(dev);
|
|
/* DT keeps this entry in mA, musb expects it as per USB spec */
|
|
pdata.power = get_int_prop(dn, "mentor,power") / 2;
|
|
|
|
ret = of_property_read_u32(dn, "mentor,multipoint", &val);
|
|
if (!ret && val)
|
|
config->multipoint = true;
|
|
|
|
config->maximum_speed = usb_get_maximum_speed(&parent->dev);
|
|
switch (config->maximum_speed) {
|
|
case USB_SPEED_LOW:
|
|
case USB_SPEED_FULL:
|
|
break;
|
|
case USB_SPEED_SUPER:
|
|
dev_warn(dev, "ignore incorrect maximum_speed "
|
|
"(super-speed) setting in dts");
|
|
/* fall through */
|
|
default:
|
|
config->maximum_speed = USB_SPEED_HIGH;
|
|
}
|
|
|
|
ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
|
|
if (ret) {
|
|
dev_err(dev, "failed to add platform_data\n");
|
|
goto err;
|
|
}
|
|
|
|
ret = platform_device_add(musb);
|
|
if (ret) {
|
|
dev_err(dev, "failed to register musb device\n");
|
|
goto err;
|
|
}
|
|
return 0;
|
|
|
|
err:
|
|
platform_device_put(musb);
|
|
return ret;
|
|
}
|
|
|
|
static irqreturn_t dsps_vbus_threaded_irq(int irq, void *priv)
|
|
{
|
|
struct dsps_glue *glue = priv;
|
|
struct musb *musb = platform_get_drvdata(glue->musb);
|
|
|
|
if (!musb)
|
|
return IRQ_NONE;
|
|
|
|
dev_dbg(glue->dev, "VBUS interrupt\n");
|
|
dsps_mod_timer(glue, 0);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int dsps_setup_optional_vbus_irq(struct platform_device *pdev,
|
|
struct dsps_glue *glue)
|
|
{
|
|
int error;
|
|
|
|
glue->vbus_irq = platform_get_irq_byname(pdev, "vbus");
|
|
if (glue->vbus_irq == -EPROBE_DEFER)
|
|
return -EPROBE_DEFER;
|
|
|
|
if (glue->vbus_irq <= 0) {
|
|
glue->vbus_irq = 0;
|
|
return 0;
|
|
}
|
|
|
|
error = devm_request_threaded_irq(glue->dev, glue->vbus_irq,
|
|
NULL, dsps_vbus_threaded_irq,
|
|
IRQF_ONESHOT,
|
|
"vbus", glue);
|
|
if (error) {
|
|
glue->vbus_irq = 0;
|
|
return error;
|
|
}
|
|
dev_dbg(glue->dev, "VBUS irq %i configured\n", glue->vbus_irq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dsps_probe(struct platform_device *pdev)
|
|
{
|
|
const struct of_device_id *match;
|
|
const struct dsps_musb_wrapper *wrp;
|
|
struct dsps_glue *glue;
|
|
int ret;
|
|
|
|
if (!strcmp(pdev->name, "musb-hdrc"))
|
|
return -ENODEV;
|
|
|
|
match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
|
|
if (!match) {
|
|
dev_err(&pdev->dev, "fail to get matching of_match struct\n");
|
|
return -EINVAL;
|
|
}
|
|
wrp = match->data;
|
|
|
|
if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
|
|
dsps_ops.read_fifo = dsps_read_fifo32;
|
|
|
|
/* allocate glue */
|
|
glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
|
|
if (!glue)
|
|
return -ENOMEM;
|
|
|
|
glue->dev = &pdev->dev;
|
|
glue->wrp = wrp;
|
|
glue->usbss_base = of_iomap(pdev->dev.parent->of_node, 0);
|
|
if (!glue->usbss_base)
|
|
return -ENXIO;
|
|
|
|
if (usb_get_dr_mode(&pdev->dev) == USB_DR_MODE_PERIPHERAL) {
|
|
ret = dsps_setup_optional_vbus_irq(pdev, glue);
|
|
if (ret)
|
|
goto err_iounmap;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, glue);
|
|
pm_runtime_enable(&pdev->dev);
|
|
ret = dsps_create_musb_pdev(glue, pdev);
|
|
if (ret)
|
|
goto err;
|
|
|
|
return 0;
|
|
|
|
err:
|
|
pm_runtime_disable(&pdev->dev);
|
|
err_iounmap:
|
|
iounmap(glue->usbss_base);
|
|
return ret;
|
|
}
|
|
|
|
static int dsps_remove(struct platform_device *pdev)
|
|
{
|
|
struct dsps_glue *glue = platform_get_drvdata(pdev);
|
|
|
|
platform_device_unregister(glue->musb);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
iounmap(glue->usbss_base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dsps_musb_wrapper am33xx_driver_data = {
|
|
.revision = 0x00,
|
|
.control = 0x14,
|
|
.status = 0x18,
|
|
.epintr_set = 0x38,
|
|
.epintr_clear = 0x40,
|
|
.epintr_status = 0x30,
|
|
.coreintr_set = 0x3c,
|
|
.coreintr_clear = 0x44,
|
|
.coreintr_status = 0x34,
|
|
.phy_utmi = 0xe0,
|
|
.mode = 0xe8,
|
|
.tx_mode = 0x70,
|
|
.rx_mode = 0x74,
|
|
.reset = 0,
|
|
.otg_disable = 21,
|
|
.iddig = 8,
|
|
.iddig_mux = 7,
|
|
.usb_shift = 0,
|
|
.usb_mask = 0x1ff,
|
|
.usb_bitmap = (0x1ff << 0),
|
|
.drvvbus = 8,
|
|
.txep_shift = 0,
|
|
.txep_mask = 0xffff,
|
|
.txep_bitmap = (0xffff << 0),
|
|
.rxep_shift = 16,
|
|
.rxep_mask = 0xfffe,
|
|
.rxep_bitmap = (0xfffe << 16),
|
|
.poll_timeout = 2000, /* ms */
|
|
};
|
|
|
|
static const struct of_device_id musb_dsps_of_match[] = {
|
|
{ .compatible = "ti,musb-am33xx",
|
|
.data = &am33xx_driver_data, },
|
|
{ .compatible = "ti,musb-dm816",
|
|
.data = &am33xx_driver_data, },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int dsps_suspend(struct device *dev)
|
|
{
|
|
struct dsps_glue *glue = dev_get_drvdata(dev);
|
|
const struct dsps_musb_wrapper *wrp = glue->wrp;
|
|
struct musb *musb = platform_get_drvdata(glue->musb);
|
|
void __iomem *mbase;
|
|
int ret;
|
|
|
|
if (!musb)
|
|
/* This can happen if the musb device is in -EPROBE_DEFER */
|
|
return 0;
|
|
|
|
ret = pm_runtime_get_sync(dev);
|
|
if (ret < 0) {
|
|
pm_runtime_put_noidle(dev);
|
|
return ret;
|
|
}
|
|
|
|
del_timer_sync(&musb->dev_timer);
|
|
|
|
mbase = musb->ctrl_base;
|
|
glue->context.control = musb_readl(mbase, wrp->control);
|
|
glue->context.epintr = musb_readl(mbase, wrp->epintr_set);
|
|
glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set);
|
|
glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi);
|
|
glue->context.mode = musb_readl(mbase, wrp->mode);
|
|
glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode);
|
|
glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode);
|
|
|
|
dsps_dma_controller_suspend(glue);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dsps_resume(struct device *dev)
|
|
{
|
|
struct dsps_glue *glue = dev_get_drvdata(dev);
|
|
const struct dsps_musb_wrapper *wrp = glue->wrp;
|
|
struct musb *musb = platform_get_drvdata(glue->musb);
|
|
void __iomem *mbase;
|
|
|
|
if (!musb)
|
|
return 0;
|
|
|
|
dsps_dma_controller_resume(glue);
|
|
|
|
mbase = musb->ctrl_base;
|
|
musb_writel(mbase, wrp->control, glue->context.control);
|
|
musb_writel(mbase, wrp->epintr_set, glue->context.epintr);
|
|
musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
|
|
musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
|
|
musb_writel(mbase, wrp->mode, glue->context.mode);
|
|
musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
|
|
musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
|
|
if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
|
|
musb->port_mode == MUSB_OTG)
|
|
dsps_mod_timer(glue, -1);
|
|
|
|
pm_runtime_put(dev);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
|
|
|
|
static struct platform_driver dsps_usbss_driver = {
|
|
.probe = dsps_probe,
|
|
.remove = dsps_remove,
|
|
.driver = {
|
|
.name = "musb-dsps",
|
|
.pm = &dsps_pm_ops,
|
|
.of_match_table = musb_dsps_of_match,
|
|
},
|
|
};
|
|
|
|
MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
|
|
MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
|
|
MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
|
|
MODULE_LICENSE("GPL v2");
|
|
|
|
module_platform_driver(dsps_usbss_driver);
|