170 lines
3.7 KiB
YAML
170 lines
3.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/can/xilinx,can.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title:
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Xilinx Axi CAN/Zynq CANPS controller
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maintainers:
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- Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
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properties:
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compatible:
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enum:
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- xlnx,zynq-can-1.0
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- xlnx,axi-can-1.00.a
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- xlnx,canfd-1.0
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- xlnx,canfd-2.0
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 2
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clock-names:
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maxItems: 2
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power-domains:
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maxItems: 1
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tx-fifo-depth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: CAN Tx fifo depth (Zynq, Axi CAN).
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rx-fifo-depth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode)
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tx-mailbox-count:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: CAN Tx mailbox buffer count (CAN FD)
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resets:
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maxItems: 1
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xlnx,has-ecc:
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$ref: /schemas/types.yaml#/definitions/flag
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description: CAN TX_OL, TX_TL and RX FIFOs have ECC support(AXI CAN)
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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allOf:
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- $ref: can-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- xlnx,zynq-can-1.0
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then:
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properties:
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clock-names:
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items:
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- const: can_clk
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- const: pclk
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required:
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- tx-fifo-depth
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- rx-fifo-depth
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- if:
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properties:
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compatible:
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contains:
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enum:
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- xlnx,axi-can-1.00.a
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then:
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properties:
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clock-names:
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items:
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- const: can_clk
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- const: s_axi_aclk
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required:
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- tx-fifo-depth
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- rx-fifo-depth
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- if:
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properties:
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compatible:
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contains:
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enum:
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- xlnx,canfd-1.0
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- xlnx,canfd-2.0
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then:
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properties:
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clock-names:
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items:
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- const: can_clk
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- const: s_axi_aclk
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required:
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- tx-mailbox-count
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- rx-fifo-depth
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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can@e0008000 {
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compatible = "xlnx,zynq-can-1.0";
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reg = <0xe0008000 0x1000>;
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clocks = <&clkc 19>, <&clkc 36>;
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clock-names = "can_clk", "pclk";
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&intc>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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};
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- |
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can@40000000 {
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compatible = "xlnx,axi-can-1.00.a";
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reg = <0x40000000 0x10000>;
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clocks = <&clkc 0>, <&clkc 1>;
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clock-names = "can_clk", "s_axi_aclk";
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interrupt-parent = <&intc>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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xlnx,has-ecc;
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};
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- |
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can@40000000 {
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compatible = "xlnx,canfd-1.0";
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reg = <0x40000000 0x2000>;
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clocks = <&clkc 0>, <&clkc 1>;
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clock-names = "can_clk", "s_axi_aclk";
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interrupt-parent = <&intc>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
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tx-mailbox-count = <0x20>;
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rx-fifo-depth = <0x20>;
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};
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- |
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can@ff060000 {
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compatible = "xlnx,canfd-2.0";
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reg = <0xff060000 0x6000>;
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clocks = <&clkc 0>, <&clkc 1>;
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clock-names = "can_clk", "s_axi_aclk";
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interrupt-parent = <&intc>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
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tx-mailbox-count = <0x20>;
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rx-fifo-depth = <0x40>;
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};
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