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921dbe52b4
In case of Mihi, SPI bus is shared between APB1 and APB2 SPI ROMs, so their FW flashing must be sequential and arche-platform driver should make sure that they are mutual exclusive in nature. So this patch adds certain restrictions to the user of the arche-platform driver, - User can no longer flash APB1 and APB2 SPI ROM in parallel - SPI bus becomes an resource, so user must claim it by moving respective APB device into FW_FLASHING mode and release it by exiting FW_FLASHING mode. User can exit FW_FLASHING mode by switching to any other modes (ACTIVE, OFF, STANDBY). - If APB1 is in FW_FLASHING mode, APB2 can no longer enter into FW_FLASHING mode. User will get -EBUSY. Having said that, while APB1 is into FW_FLASHING mode, APB2 can independently boot from its own SPI ROM. Testing Done: Tested by simulating usecase on EVT2. - Made sure that APB1 and APB2 FW_FLASHING mode is mutual exclusive in nature. Confirmed that an attempt on second device return -EBUSY. - Added simulating code, where printed state of dummy gpio for spi-en and verified that it shows right pin status for both APBs Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> |
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drivers/staging/greybus |