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b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
213 lines
7.2 KiB
C
213 lines
7.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/****************************************************************************/
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/*
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* m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
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*
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* (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
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*/
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/****************************************************************************/
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#ifndef m520xsim_h
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#define m520xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m520x)"
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#define CPU_INSTR_PER_JIFFY 3
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#define MCF_BUSCLK (MCF_CLK / 2)
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#include <asm/m52xxacr.h>
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/*
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* Define the 520x SIM register set addresses.
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*/
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#define MCFICM_INTC0 0xFC048000 /* Base for Interrupt Ctrl 0 */
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#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
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#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
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#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
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#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
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#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
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#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
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#define MCFINTC_SIMR 0x1c /* Set interrupt mask 0-63 */
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#define MCFINTC_CIMR 0x1d /* Clear interrupt mask 0-63 */
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#define MCFINTC_ICR0 0x40 /* Base ICR register */
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/*
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* The common interrupt controller code just wants to know the absolute
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* address to the SIMR and CIMR registers (not offsets into IPSBAR).
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* The 520x family only has a single INTC unit.
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*/
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#define MCFINTC0_SIMR (MCFICM_INTC0 + MCFINTC_SIMR)
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#define MCFINTC0_CIMR (MCFICM_INTC0 + MCFINTC_CIMR)
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#define MCFINTC0_ICR0 (MCFICM_INTC0 + MCFINTC_ICR0)
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#define MCFINTC1_SIMR (0)
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#define MCFINTC1_CIMR (0)
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#define MCFINTC1_ICR0 (0)
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#define MCFINTC2_SIMR (0)
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#define MCFINTC2_CIMR (0)
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#define MCFINTC2_ICR0 (0)
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#define MCFINT_VECBASE 64
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#define MCFINT_UART0 26 /* Interrupt number for UART0 */
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#define MCFINT_UART1 27 /* Interrupt number for UART1 */
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#define MCFINT_UART2 28 /* Interrupt number for UART2 */
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#define MCFINT_I2C0 30 /* Interrupt number for I2C */
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#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
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#define MCFINT_FECRX0 36 /* Interrupt number for FEC RX */
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#define MCFINT_FECTX0 40 /* Interrupt number for FEC RX */
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#define MCFINT_FECENTC0 42 /* Interrupt number for FEC RX */
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#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */
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#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
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#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
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#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
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#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
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#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
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#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
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#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
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#define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1)
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#define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
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/*
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* SDRAM configuration registers.
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*/
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#define MCFSIM_SDMR 0xFC0a8000 /* SDRAM Mode/Extended Mode Register */
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#define MCFSIM_SDCR 0xFC0a8004 /* SDRAM Control Register */
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#define MCFSIM_SDCFG1 0xFC0a8008 /* SDRAM Configuration Register 1 */
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#define MCFSIM_SDCFG2 0xFC0a800c /* SDRAM Configuration Register 2 */
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#define MCFSIM_SDCS0 0xFC0a8110 /* SDRAM Chip Select 0 Configuration */
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#define MCFSIM_SDCS1 0xFC0a8114 /* SDRAM Chip Select 1 Configuration */
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/*
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* EPORT and GPIO registers.
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*/
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#define MCFEPORT_EPPAR 0xFC088000
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#define MCFEPORT_EPDDR 0xFC088002
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#define MCFEPORT_EPIER 0xFC088003
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#define MCFEPORT_EPDR 0xFC088004
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#define MCFEPORT_EPPDR 0xFC088005
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#define MCFEPORT_EPFR 0xFC088006
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#define MCFGPIO_PODR_BUSCTL 0xFC0A4000
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#define MCFGPIO_PODR_BE 0xFC0A4001
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#define MCFGPIO_PODR_CS 0xFC0A4002
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#define MCFGPIO_PODR_FECI2C 0xFC0A4003
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#define MCFGPIO_PODR_QSPI 0xFC0A4004
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#define MCFGPIO_PODR_TIMER 0xFC0A4005
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#define MCFGPIO_PODR_UART 0xFC0A4006
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#define MCFGPIO_PODR_FECH 0xFC0A4007
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#define MCFGPIO_PODR_FECL 0xFC0A4008
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#define MCFGPIO_PDDR_BUSCTL 0xFC0A400C
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#define MCFGPIO_PDDR_BE 0xFC0A400D
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#define MCFGPIO_PDDR_CS 0xFC0A400E
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#define MCFGPIO_PDDR_FECI2C 0xFC0A400F
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#define MCFGPIO_PDDR_QSPI 0xFC0A4010
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#define MCFGPIO_PDDR_TIMER 0xFC0A4011
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#define MCFGPIO_PDDR_UART 0xFC0A4012
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#define MCFGPIO_PDDR_FECH 0xFC0A4013
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#define MCFGPIO_PDDR_FECL 0xFC0A4014
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#define MCFGPIO_PPDSDR_CS 0xFC0A401A
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#define MCFGPIO_PPDSDR_FECI2C 0xFC0A401B
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#define MCFGPIO_PPDSDR_QSPI 0xFC0A401C
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#define MCFGPIO_PPDSDR_TIMER 0xFC0A401D
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#define MCFGPIO_PPDSDR_UART 0xFC0A401E
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#define MCFGPIO_PPDSDR_FECH 0xFC0A401F
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#define MCFGPIO_PPDSDR_FECL 0xFC0A4020
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#define MCFGPIO_PCLRR_BUSCTL 0xFC0A4024
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#define MCFGPIO_PCLRR_BE 0xFC0A4025
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#define MCFGPIO_PCLRR_CS 0xFC0A4026
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#define MCFGPIO_PCLRR_FECI2C 0xFC0A4027
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#define MCFGPIO_PCLRR_QSPI 0xFC0A4028
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#define MCFGPIO_PCLRR_TIMER 0xFC0A4029
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#define MCFGPIO_PCLRR_UART 0xFC0A402A
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#define MCFGPIO_PCLRR_FECH 0xFC0A402B
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#define MCFGPIO_PCLRR_FECL 0xFC0A402C
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/*
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* Generic GPIO support
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*/
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#define MCFGPIO_PODR MCFGPIO_PODR_CS
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#define MCFGPIO_PDDR MCFGPIO_PDDR_CS
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#define MCFGPIO_PPDR MCFGPIO_PPDSDR_CS
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#define MCFGPIO_SETR MCFGPIO_PPDSDR_CS
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#define MCFGPIO_CLRR MCFGPIO_PCLRR_CS
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#define MCFGPIO_PIN_MAX 80
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#define MCFGPIO_IRQ_MAX 8
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#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
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#define MCF_GPIO_PAR_UART 0xFC0A4036
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#define MCF_GPIO_PAR_FECI2C 0xFC0A4033
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#define MCF_GPIO_PAR_QSPI 0xFC0A4034
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#define MCF_GPIO_PAR_FEC 0xFC0A4038
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#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001)
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#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002)
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#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040)
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#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080)
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#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
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#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)
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/*
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* PIT timer module.
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*/
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#define MCFPIT_BASE1 0xFC080000 /* Base address of TIMER1 */
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#define MCFPIT_BASE2 0xFC084000 /* Base address of TIMER2 */
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/*
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* UART module.
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*/
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#define MCFUART_BASE0 0xFC060000 /* Base address of UART0 */
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#define MCFUART_BASE1 0xFC064000 /* Base address of UART1 */
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#define MCFUART_BASE2 0xFC068000 /* Base address of UART2 */
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/*
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* FEC module.
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*/
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#define MCFFEC_BASE0 0xFC030000 /* Base of FEC ethernet */
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#define MCFFEC_SIZE0 0x800 /* Register set size */
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/*
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* QSPI module.
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*/
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#define MCFQSPI_BASE 0xFC05C000 /* Base of QSPI module */
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#define MCFQSPI_SIZE 0x40 /* Register set size */
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#define MCFQSPI_CS0 46
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#define MCFQSPI_CS1 47
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#define MCFQSPI_CS2 27
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/*
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* Reset Control Unit.
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*/
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#define MCF_RCR 0xFC0A0000
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#define MCF_RSR 0xFC0A0001
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#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
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#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
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/*
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* Power Management.
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*/
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#define MCFPM_WCR 0xfc040013
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#define MCFPM_PPMSR0 0xfc04002c
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#define MCFPM_PPMCR0 0xfc04002d
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#define MCFPM_PPMHR0 0xfc040030
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#define MCFPM_PPMLR0 0xfc040034
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#define MCFPM_LPCR 0xfc0a0007
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/*
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* I2C module.
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*/
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#define MCFI2C_BASE0 0xFC058000
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#define MCFI2C_SIZE0 0x40
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/****************************************************************************/
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#endif /* m520xsim_h */
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