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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
568 lines
14 KiB
C
568 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Regulator driver for National Semiconductors LP3972 PMIC chip
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*
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* Based on lp3971.c
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*/
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#include <linux/bug.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/lp3972.h>
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#include <linux/slab.h>
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struct lp3972 {
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struct device *dev;
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struct mutex io_lock;
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struct i2c_client *i2c;
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};
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/* LP3972 Control Registers */
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#define LP3972_SCR_REG 0x07
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#define LP3972_OVER1_REG 0x10
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#define LP3972_OVSR1_REG 0x11
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#define LP3972_OVER2_REG 0x12
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#define LP3972_OVSR2_REG 0x13
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#define LP3972_VCC1_REG 0x20
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#define LP3972_ADTV1_REG 0x23
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#define LP3972_ADTV2_REG 0x24
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#define LP3972_AVRC_REG 0x25
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#define LP3972_CDTC1_REG 0x26
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#define LP3972_CDTC2_REG 0x27
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#define LP3972_SDTV1_REG 0x29
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#define LP3972_SDTV2_REG 0x2A
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#define LP3972_MDTV1_REG 0x32
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#define LP3972_MDTV2_REG 0x33
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#define LP3972_L2VCR_REG 0x39
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#define LP3972_L34VCR_REG 0x3A
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#define LP3972_SCR1_REG 0x80
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#define LP3972_SCR2_REG 0x81
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#define LP3972_OEN3_REG 0x82
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#define LP3972_OSR3_REG 0x83
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#define LP3972_LOER4_REG 0x84
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#define LP3972_B2TV_REG 0x85
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#define LP3972_B3TV_REG 0x86
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#define LP3972_B32RC_REG 0x87
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#define LP3972_ISRA_REG 0x88
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#define LP3972_BCCR_REG 0x89
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#define LP3972_II1RR_REG 0x8E
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#define LP3972_II2RR_REG 0x8F
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#define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
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/* System control register 1 initial value,
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* bits 5, 6 and 7 are EPROM programmable */
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#define SYS_CONTROL1_INIT_VAL 0x02
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#define SYS_CONTROL1_INIT_MASK 0x1F
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#define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
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#define LP3972_VOL_CHANGE_FLAG_GO 0x01
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#define LP3972_VOL_CHANGE_FLAG_MASK 0x03
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/* LDO output enable mask */
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#define LP3972_OEN3_L1EN BIT(0)
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#define LP3972_OVER2_LDO2_EN BIT(2)
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#define LP3972_OVER2_LDO3_EN BIT(3)
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#define LP3972_OVER2_LDO4_EN BIT(4)
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#define LP3972_OVER1_S_EN BIT(2)
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static const unsigned int ldo1_voltage_map[] = {
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1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
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1900000, 1925000, 1950000, 1975000, 2000000,
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};
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static const unsigned int ldo23_voltage_map[] = {
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1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
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2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
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};
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static const unsigned int ldo4_voltage_map[] = {
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1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
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1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
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};
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static const unsigned int ldo5_voltage_map[] = {
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0, 0, 0, 0, 0, 850000, 875000, 900000,
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925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
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1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
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1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
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};
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static const unsigned int buck1_voltage_map[] = {
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725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000,
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925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
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1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
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1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
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};
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static const unsigned int buck23_voltage_map[] = {
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0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
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1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
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1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
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3000000, 3300000,
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};
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static const int ldo_output_enable_mask[] = {
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LP3972_OEN3_L1EN,
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LP3972_OVER2_LDO2_EN,
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LP3972_OVER2_LDO3_EN,
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LP3972_OVER2_LDO4_EN,
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LP3972_OVER1_S_EN,
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};
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static const int ldo_output_enable_addr[] = {
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LP3972_OEN3_REG,
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LP3972_OVER2_REG,
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LP3972_OVER2_REG,
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LP3972_OVER2_REG,
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LP3972_OVER1_REG,
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};
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static const int ldo_vol_ctl_addr[] = {
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LP3972_MDTV1_REG,
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LP3972_L2VCR_REG,
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LP3972_L34VCR_REG,
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LP3972_L34VCR_REG,
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LP3972_SDTV1_REG,
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};
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static const int buck_vol_enable_addr[] = {
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LP3972_OVER1_REG,
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LP3972_OEN3_REG,
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LP3972_OEN3_REG,
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};
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static const int buck_base_addr[] = {
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LP3972_ADTV1_REG,
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LP3972_B2TV_REG,
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LP3972_B3TV_REG,
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};
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#define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
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#define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
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/* LDO voltage control registers shift:
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LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
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LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
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LP3972_LDO5 -> 0
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*/
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#define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
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#define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
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#define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
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#define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
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#define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
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#define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
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#define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
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#define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
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#define LP3972_BUCK_VOL_MASK 0x1f
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static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
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u16 *dest)
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{
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int ret;
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if (count != 1)
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return -EIO;
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ret = i2c_smbus_read_byte_data(i2c, reg);
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if (ret < 0)
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return ret;
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*dest = ret;
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return 0;
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}
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static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
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const u16 *src)
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{
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if (count != 1)
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return -EIO;
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return i2c_smbus_write_byte_data(i2c, reg, *src);
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}
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static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
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{
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u16 val = 0;
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mutex_lock(&lp3972->io_lock);
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lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
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dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
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(unsigned)val & 0xff);
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mutex_unlock(&lp3972->io_lock);
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return val & 0xff;
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}
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static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
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{
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u16 tmp;
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int ret;
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mutex_lock(&lp3972->io_lock);
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ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
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if (ret == 0) {
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tmp = (tmp & ~mask) | val;
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ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
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dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
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(unsigned)val & 0xff);
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}
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mutex_unlock(&lp3972->io_lock);
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return ret;
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}
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static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int ldo = rdev_get_id(dev) - LP3972_LDO1;
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u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
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u16 val;
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val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
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return !!(val & mask);
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}
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static int lp3972_ldo_enable(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int ldo = rdev_get_id(dev) - LP3972_LDO1;
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u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
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return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
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mask, mask);
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}
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static int lp3972_ldo_disable(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int ldo = rdev_get_id(dev) - LP3972_LDO1;
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u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
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return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
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mask, 0);
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}
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static int lp3972_ldo_get_voltage_sel(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int ldo = rdev_get_id(dev) - LP3972_LDO1;
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u16 mask = LP3972_LDO_VOL_MASK(ldo);
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u16 val, reg;
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reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
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val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
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return val;
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}
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static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev,
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unsigned int selector)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int ldo = rdev_get_id(dev) - LP3972_LDO1;
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int shift, ret;
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shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
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ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
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LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift);
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if (ret)
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return ret;
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/*
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* LDO1 and LDO5 support voltage control by either target voltage1
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* or target voltage2 register.
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* We use target voltage1 register for LDO1 and LDO5 in this driver.
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* We need to update voltage change control register(0x20) to enable
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* LDO1 and LDO5 to change to their programmed target values.
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*/
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switch (ldo) {
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case LP3972_LDO1:
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case LP3972_LDO5:
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shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
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ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
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LP3972_VOL_CHANGE_FLAG_MASK << shift,
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LP3972_VOL_CHANGE_FLAG_GO << shift);
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if (ret)
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return ret;
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ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
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LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
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break;
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}
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return ret;
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}
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static const struct regulator_ops lp3972_ldo_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_ascend,
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.is_enabled = lp3972_ldo_is_enabled,
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.enable = lp3972_ldo_enable,
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.disable = lp3972_ldo_disable,
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.get_voltage_sel = lp3972_ldo_get_voltage_sel,
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.set_voltage_sel = lp3972_ldo_set_voltage_sel,
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};
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static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int buck = rdev_get_id(dev) - LP3972_DCDC1;
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u16 mask = 1 << (buck * 2);
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u16 val;
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val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
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return !!(val & mask);
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}
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static int lp3972_dcdc_enable(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int buck = rdev_get_id(dev) - LP3972_DCDC1;
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u16 mask = 1 << (buck * 2);
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u16 val;
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val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
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mask, mask);
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return val;
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}
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static int lp3972_dcdc_disable(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int buck = rdev_get_id(dev) - LP3972_DCDC1;
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u16 mask = 1 << (buck * 2);
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u16 val;
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val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
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mask, 0);
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return val;
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}
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static int lp3972_dcdc_get_voltage_sel(struct regulator_dev *dev)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int buck = rdev_get_id(dev) - LP3972_DCDC1;
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u16 reg;
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reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
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reg &= LP3972_BUCK_VOL_MASK;
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return reg;
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}
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static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev,
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unsigned int selector)
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{
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struct lp3972 *lp3972 = rdev_get_drvdata(dev);
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int buck = rdev_get_id(dev) - LP3972_DCDC1;
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int ret;
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ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
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LP3972_BUCK_VOL_MASK, selector);
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if (ret)
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return ret;
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if (buck != 0)
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return ret;
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ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
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LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
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if (ret)
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return ret;
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return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
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LP3972_VOL_CHANGE_FLAG_MASK, 0);
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}
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static const struct regulator_ops lp3972_dcdc_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_ascend,
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.is_enabled = lp3972_dcdc_is_enabled,
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.enable = lp3972_dcdc_enable,
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.disable = lp3972_dcdc_disable,
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.get_voltage_sel = lp3972_dcdc_get_voltage_sel,
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.set_voltage_sel = lp3972_dcdc_set_voltage_sel,
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};
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static const struct regulator_desc regulators[] = {
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{
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.name = "LDO1",
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.id = LP3972_LDO1,
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.ops = &lp3972_ldo_ops,
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.n_voltages = ARRAY_SIZE(ldo1_voltage_map),
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.volt_table = ldo1_voltage_map,
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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},
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{
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.name = "LDO2",
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.id = LP3972_LDO2,
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.ops = &lp3972_ldo_ops,
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.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
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.volt_table = ldo23_voltage_map,
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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},
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{
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.name = "LDO3",
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.id = LP3972_LDO3,
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.ops = &lp3972_ldo_ops,
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.n_voltages = ARRAY_SIZE(ldo23_voltage_map),
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.volt_table = ldo23_voltage_map,
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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},
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{
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.name = "LDO4",
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.id = LP3972_LDO4,
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.ops = &lp3972_ldo_ops,
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.n_voltages = ARRAY_SIZE(ldo4_voltage_map),
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.volt_table = ldo4_voltage_map,
|
|
.type = REGULATOR_VOLTAGE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
{
|
|
.name = "LDO5",
|
|
.id = LP3972_LDO5,
|
|
.ops = &lp3972_ldo_ops,
|
|
.n_voltages = ARRAY_SIZE(ldo5_voltage_map),
|
|
.volt_table = ldo5_voltage_map,
|
|
.type = REGULATOR_VOLTAGE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
{
|
|
.name = "DCDC1",
|
|
.id = LP3972_DCDC1,
|
|
.ops = &lp3972_dcdc_ops,
|
|
.n_voltages = ARRAY_SIZE(buck1_voltage_map),
|
|
.volt_table = buck1_voltage_map,
|
|
.type = REGULATOR_VOLTAGE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
{
|
|
.name = "DCDC2",
|
|
.id = LP3972_DCDC2,
|
|
.ops = &lp3972_dcdc_ops,
|
|
.n_voltages = ARRAY_SIZE(buck23_voltage_map),
|
|
.volt_table = buck23_voltage_map,
|
|
.type = REGULATOR_VOLTAGE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
{
|
|
.name = "DCDC3",
|
|
.id = LP3972_DCDC3,
|
|
.ops = &lp3972_dcdc_ops,
|
|
.n_voltages = ARRAY_SIZE(buck23_voltage_map),
|
|
.volt_table = buck23_voltage_map,
|
|
.type = REGULATOR_VOLTAGE,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int setup_regulators(struct lp3972 *lp3972,
|
|
struct lp3972_platform_data *pdata)
|
|
{
|
|
int i, err;
|
|
|
|
/* Instantiate the regulators */
|
|
for (i = 0; i < pdata->num_regulators; i++) {
|
|
struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
|
|
struct regulator_config config = { };
|
|
struct regulator_dev *rdev;
|
|
|
|
config.dev = lp3972->dev;
|
|
config.init_data = reg->initdata;
|
|
config.driver_data = lp3972;
|
|
|
|
rdev = devm_regulator_register(lp3972->dev,
|
|
®ulators[reg->id], &config);
|
|
if (IS_ERR(rdev)) {
|
|
err = PTR_ERR(rdev);
|
|
dev_err(lp3972->dev, "regulator init failed: %d\n",
|
|
err);
|
|
return err;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lp3972_i2c_probe(struct i2c_client *i2c,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct lp3972 *lp3972;
|
|
struct lp3972_platform_data *pdata = dev_get_platdata(&i2c->dev);
|
|
int ret;
|
|
u16 val;
|
|
|
|
if (!pdata) {
|
|
dev_dbg(&i2c->dev, "No platform init data supplied\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
lp3972 = devm_kzalloc(&i2c->dev, sizeof(struct lp3972), GFP_KERNEL);
|
|
if (!lp3972)
|
|
return -ENOMEM;
|
|
|
|
lp3972->i2c = i2c;
|
|
lp3972->dev = &i2c->dev;
|
|
|
|
mutex_init(&lp3972->io_lock);
|
|
|
|
/* Detect LP3972 */
|
|
ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
|
|
if (ret == 0 &&
|
|
(val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
|
|
ret = -ENODEV;
|
|
dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
|
|
}
|
|
if (ret < 0) {
|
|
dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ret = setup_regulators(lp3972, pdata);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
i2c_set_clientdata(i2c, lp3972);
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id lp3972_i2c_id[] = {
|
|
{ "lp3972", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
|
|
|
|
static struct i2c_driver lp3972_i2c_driver = {
|
|
.driver = {
|
|
.name = "lp3972",
|
|
},
|
|
.probe = lp3972_i2c_probe,
|
|
.id_table = lp3972_i2c_id,
|
|
};
|
|
|
|
static int __init lp3972_module_init(void)
|
|
{
|
|
return i2c_add_driver(&lp3972_i2c_driver);
|
|
}
|
|
subsys_initcall(lp3972_module_init);
|
|
|
|
static void __exit lp3972_module_exit(void)
|
|
{
|
|
i2c_del_driver(&lp3972_i2c_driver);
|
|
}
|
|
module_exit(lp3972_module_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
|
|
MODULE_DESCRIPTION("LP3972 PMIC driver");
|