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941d71c736
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Updated spi node to new espi binding specification * Renamed 'sdhci' node to 'sdhc' * Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the 'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum * Fixed wrong reg offsets for mdio nodes associated with etsec2 & * etsec3 * Dropping "fsl,p2020-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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| relocs_check.pl | ||