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![Chris Wilson](/assets/img/avatar_default.png)
We have a few instances of checking seqno-1 to see if the HW has started the request. Pull those together under a helper. v2: Pull the !seqno assertion higher, as given seqno==1 we may indeed check to see if we have started using seqno==0. Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180806112605.20725-1-chris@chris-wilson.co.uk
896 lines
26 KiB
C
896 lines
26 KiB
C
/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <linux/kthread.h>
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#include <uapi/linux/sched/types.h>
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#include "i915_drv.h"
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#ifdef CONFIG_SMP
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#define task_asleep(tsk) ((tsk)->state & TASK_NORMAL && !(tsk)->on_cpu)
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#else
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#define task_asleep(tsk) ((tsk)->state & TASK_NORMAL)
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#endif
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static unsigned int __intel_breadcrumbs_wakeup(struct intel_breadcrumbs *b)
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{
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struct intel_wait *wait;
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unsigned int result = 0;
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lockdep_assert_held(&b->irq_lock);
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wait = b->irq_wait;
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if (wait) {
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/*
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* N.B. Since task_asleep() and ttwu are not atomic, the
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* waiter may actually go to sleep after the check, causing
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* us to suppress a valid wakeup. We prefer to reduce the
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* number of false positive missed_breadcrumb() warnings
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* at the expense of a few false negatives, as it it easy
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* to trigger a false positive under heavy load. Enough
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* signal should remain from genuine missed_breadcrumb()
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* for us to detect in CI.
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*/
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bool was_asleep = task_asleep(wait->tsk);
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result = ENGINE_WAKEUP_WAITER;
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if (wake_up_process(wait->tsk) && was_asleep)
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result |= ENGINE_WAKEUP_ASLEEP;
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}
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return result;
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}
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unsigned int intel_engine_wakeup(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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unsigned long flags;
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unsigned int result;
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spin_lock_irqsave(&b->irq_lock, flags);
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result = __intel_breadcrumbs_wakeup(b);
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spin_unlock_irqrestore(&b->irq_lock, flags);
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return result;
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}
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static unsigned long wait_timeout(void)
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{
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return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
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}
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static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
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{
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if (GEM_SHOW_DEBUG()) {
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struct drm_printer p = drm_debug_printer(__func__);
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intel_engine_dump(engine, &p,
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"%s missed breadcrumb at %pS\n",
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engine->name, __builtin_return_address(0));
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}
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set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
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}
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static void intel_breadcrumbs_hangcheck(struct timer_list *t)
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{
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struct intel_engine_cs *engine =
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from_timer(engine, t, breadcrumbs.hangcheck);
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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unsigned int irq_count;
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if (!b->irq_armed)
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return;
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irq_count = READ_ONCE(b->irq_count);
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if (b->hangcheck_interrupts != irq_count) {
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b->hangcheck_interrupts = irq_count;
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mod_timer(&b->hangcheck, wait_timeout());
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return;
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}
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/* We keep the hangcheck timer alive until we disarm the irq, even
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* if there are no waiters at present.
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*
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* If the waiter was currently running, assume it hasn't had a chance
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* to process the pending interrupt (e.g, low priority task on a loaded
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* system) and wait until it sleeps before declaring a missed interrupt.
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*
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* If the waiter was asleep (and not even pending a wakeup), then we
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* must have missed an interrupt as the GPU has stopped advancing
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* but we still have a waiter. Assuming all batches complete within
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* DRM_I915_HANGCHECK_JIFFIES [1.5s]!
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*/
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if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP) {
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missed_breadcrumb(engine);
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mod_timer(&b->fake_irq, jiffies + 1);
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} else {
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mod_timer(&b->hangcheck, wait_timeout());
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}
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}
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static void intel_breadcrumbs_fake_irq(struct timer_list *t)
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{
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struct intel_engine_cs *engine =
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from_timer(engine, t, breadcrumbs.fake_irq);
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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/*
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* The timer persists in case we cannot enable interrupts,
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* or if we have previously seen seqno/interrupt incoherency
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* ("missed interrupt" syndrome, better known as a "missed breadcrumb").
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* Here the worker will wake up every jiffie in order to kick the
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* oldest waiter to do the coherent seqno check.
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*/
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spin_lock_irq(&b->irq_lock);
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if (b->irq_armed && !__intel_breadcrumbs_wakeup(b))
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__intel_engine_disarm_breadcrumbs(engine);
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spin_unlock_irq(&b->irq_lock);
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if (!b->irq_armed)
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return;
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/* If the user has disabled the fake-irq, restore the hangchecking */
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if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings)) {
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mod_timer(&b->hangcheck, wait_timeout());
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return;
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}
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mod_timer(&b->fake_irq, jiffies + 1);
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}
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static void irq_enable(struct intel_engine_cs *engine)
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{
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/*
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* FIXME: Ideally we want this on the API boundary, but for the
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* sake of testing with mock breadcrumbs (no HW so unable to
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* enable irqs) we place it deep within the bowels, at the point
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* of no return.
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*/
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GEM_BUG_ON(!intel_irqs_enabled(engine->i915));
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/* Enabling the IRQ may miss the generation of the interrupt, but
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* we still need to force the barrier before reading the seqno,
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* just in case.
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*/
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set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
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/* Caller disables interrupts */
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if (engine->irq_enable) {
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spin_lock(&engine->i915->irq_lock);
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engine->irq_enable(engine);
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spin_unlock(&engine->i915->irq_lock);
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}
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}
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static void irq_disable(struct intel_engine_cs *engine)
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{
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/* Caller disables interrupts */
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if (engine->irq_disable) {
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spin_lock(&engine->i915->irq_lock);
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engine->irq_disable(engine);
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spin_unlock(&engine->i915->irq_lock);
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}
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}
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void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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lockdep_assert_held(&b->irq_lock);
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GEM_BUG_ON(b->irq_wait);
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GEM_BUG_ON(!b->irq_armed);
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GEM_BUG_ON(!b->irq_enabled);
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if (!--b->irq_enabled)
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irq_disable(engine);
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b->irq_armed = false;
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}
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void intel_engine_pin_breadcrumbs_irq(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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spin_lock_irq(&b->irq_lock);
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if (!b->irq_enabled++)
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irq_enable(engine);
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GEM_BUG_ON(!b->irq_enabled); /* no overflow! */
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spin_unlock_irq(&b->irq_lock);
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}
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void intel_engine_unpin_breadcrumbs_irq(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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spin_lock_irq(&b->irq_lock);
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GEM_BUG_ON(!b->irq_enabled); /* no underflow! */
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if (!--b->irq_enabled)
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irq_disable(engine);
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spin_unlock_irq(&b->irq_lock);
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}
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void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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struct intel_wait *wait, *n;
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if (!b->irq_armed)
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return;
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/*
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* We only disarm the irq when we are idle (all requests completed),
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* so if the bottom-half remains asleep, it missed the request
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* completion.
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*/
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if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP)
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missed_breadcrumb(engine);
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spin_lock_irq(&b->rb_lock);
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spin_lock(&b->irq_lock);
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b->irq_wait = NULL;
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if (b->irq_armed)
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__intel_engine_disarm_breadcrumbs(engine);
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spin_unlock(&b->irq_lock);
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rbtree_postorder_for_each_entry_safe(wait, n, &b->waiters, node) {
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GEM_BUG_ON(!intel_engine_signaled(engine, wait->seqno));
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RB_CLEAR_NODE(&wait->node);
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wake_up_process(wait->tsk);
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}
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b->waiters = RB_ROOT;
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spin_unlock_irq(&b->rb_lock);
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}
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static bool use_fake_irq(const struct intel_breadcrumbs *b)
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{
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const struct intel_engine_cs *engine =
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container_of(b, struct intel_engine_cs, breadcrumbs);
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if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
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return false;
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/*
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* Only start with the heavy weight fake irq timer if we have not
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* seen any interrupts since enabling it the first time. If the
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* interrupts are still arriving, it means we made a mistake in our
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* engine->seqno_barrier(), a timing error that should be transient
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* and unlikely to reoccur.
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*/
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return READ_ONCE(b->irq_count) == b->hangcheck_interrupts;
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}
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static void enable_fake_irq(struct intel_breadcrumbs *b)
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{
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/* Ensure we never sleep indefinitely */
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if (!b->irq_enabled || use_fake_irq(b))
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mod_timer(&b->fake_irq, jiffies + 1);
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else
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mod_timer(&b->hangcheck, wait_timeout());
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}
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static bool __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
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{
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struct intel_engine_cs *engine =
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container_of(b, struct intel_engine_cs, breadcrumbs);
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struct drm_i915_private *i915 = engine->i915;
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bool enabled;
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lockdep_assert_held(&b->irq_lock);
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if (b->irq_armed)
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return false;
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/* The breadcrumb irq will be disarmed on the interrupt after the
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* waiters are signaled. This gives us a single interrupt window in
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* which we can add a new waiter and avoid the cost of re-enabling
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* the irq.
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*/
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b->irq_armed = true;
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if (I915_SELFTEST_ONLY(b->mock)) {
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/* For our mock objects we want to avoid interaction
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* with the real hardware (which is not set up). So
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* we simply pretend we have enabled the powerwell
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* and the irq, and leave it up to the mock
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* implementation to call intel_engine_wakeup()
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* itself when it wants to simulate a user interrupt,
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*/
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return true;
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}
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/* Since we are waiting on a request, the GPU should be busy
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* and should have its own rpm reference. This is tracked
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* by i915->gt.awake, we can forgo holding our own wakref
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* for the interrupt as before i915->gt.awake is released (when
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* the driver is idle) we disarm the breadcrumbs.
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*/
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/* No interrupts? Kick the waiter every jiffie! */
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enabled = false;
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if (!b->irq_enabled++ &&
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!test_bit(engine->id, &i915->gpu_error.test_irq_rings)) {
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irq_enable(engine);
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enabled = true;
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}
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enable_fake_irq(b);
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return enabled;
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}
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static inline struct intel_wait *to_wait(struct rb_node *node)
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{
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return rb_entry(node, struct intel_wait, node);
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}
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static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
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struct intel_wait *wait)
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{
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lockdep_assert_held(&b->rb_lock);
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GEM_BUG_ON(b->irq_wait == wait);
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/*
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* This request is completed, so remove it from the tree, mark it as
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* complete, and *then* wake up the associated task. N.B. when the
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* task wakes up, it will find the empty rb_node, discern that it
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* has already been removed from the tree and skip the serialisation
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* of the b->rb_lock and b->irq_lock. This means that the destruction
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* of the intel_wait is not serialised with the interrupt handler
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* by the waiter - it must instead be serialised by the caller.
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*/
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rb_erase(&wait->node, &b->waiters);
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RB_CLEAR_NODE(&wait->node);
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if (wait->tsk->state != TASK_RUNNING)
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wake_up_process(wait->tsk); /* implicit smp_wmb() */
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}
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static inline void __intel_breadcrumbs_next(struct intel_engine_cs *engine,
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struct rb_node *next)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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spin_lock(&b->irq_lock);
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GEM_BUG_ON(!b->irq_armed);
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GEM_BUG_ON(!b->irq_wait);
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b->irq_wait = to_wait(next);
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spin_unlock(&b->irq_lock);
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/* We always wake up the next waiter that takes over as the bottom-half
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* as we may delegate not only the irq-seqno barrier to the next waiter
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* but also the task of waking up concurrent waiters.
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*/
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if (next)
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wake_up_process(to_wait(next)->tsk);
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}
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static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
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struct intel_wait *wait)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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struct rb_node **p, *parent, *completed;
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bool first, armed;
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u32 seqno;
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GEM_BUG_ON(!wait->seqno);
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/* Insert the request into the retirement ordered list
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* of waiters by walking the rbtree. If we are the oldest
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* seqno in the tree (the first to be retired), then
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* set ourselves as the bottom-half.
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*
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* As we descend the tree, prune completed branches since we hold the
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* spinlock we know that the first_waiter must be delayed and can
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* reduce some of the sequential wake up latency if we take action
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* ourselves and wake up the completed tasks in parallel. Also, by
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* removing stale elements in the tree, we may be able to reduce the
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* ping-pong between the old bottom-half and ourselves as first-waiter.
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*/
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armed = false;
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first = true;
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parent = NULL;
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completed = NULL;
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seqno = intel_engine_get_seqno(engine);
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/* If the request completed before we managed to grab the spinlock,
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* return now before adding ourselves to the rbtree. We let the
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* current bottom-half handle any pending wakeups and instead
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* try and get out of the way quickly.
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*/
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if (i915_seqno_passed(seqno, wait->seqno)) {
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RB_CLEAR_NODE(&wait->node);
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return first;
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}
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p = &b->waiters.rb_node;
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while (*p) {
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parent = *p;
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if (wait->seqno == to_wait(parent)->seqno) {
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/* We have multiple waiters on the same seqno, select
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* the highest priority task (that with the smallest
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* task->prio) to serve as the bottom-half for this
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* group.
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*/
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if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
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p = &parent->rb_right;
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first = false;
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} else {
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p = &parent->rb_left;
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}
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} else if (i915_seqno_passed(wait->seqno,
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to_wait(parent)->seqno)) {
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p = &parent->rb_right;
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if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
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completed = parent;
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else
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first = false;
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} else {
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p = &parent->rb_left;
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}
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}
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rb_link_node(&wait->node, parent, p);
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rb_insert_color(&wait->node, &b->waiters);
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if (first) {
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spin_lock(&b->irq_lock);
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b->irq_wait = wait;
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/* After assigning ourselves as the new bottom-half, we must
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* perform a cursory check to prevent a missed interrupt.
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* Either we miss the interrupt whilst programming the hardware,
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* or if there was a previous waiter (for a later seqno) they
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* may be woken instead of us (due to the inherent race
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* in the unlocked read of b->irq_seqno_bh in the irq handler)
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* and so we miss the wake up.
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*/
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armed = __intel_breadcrumbs_enable_irq(b);
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spin_unlock(&b->irq_lock);
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}
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if (completed) {
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/* Advance the bottom-half (b->irq_wait) before we wake up
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* the waiters who may scribble over their intel_wait
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* just as the interrupt handler is dereferencing it via
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* b->irq_wait.
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*/
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if (!first) {
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|
struct rb_node *next = rb_next(completed);
|
|
GEM_BUG_ON(next == &wait->node);
|
|
__intel_breadcrumbs_next(engine, next);
|
|
}
|
|
|
|
do {
|
|
struct intel_wait *crumb = to_wait(completed);
|
|
completed = rb_prev(completed);
|
|
__intel_breadcrumbs_finish(b, crumb);
|
|
} while (completed);
|
|
}
|
|
|
|
GEM_BUG_ON(!b->irq_wait);
|
|
GEM_BUG_ON(!b->irq_armed);
|
|
GEM_BUG_ON(rb_first(&b->waiters) != &b->irq_wait->node);
|
|
|
|
return armed;
|
|
}
|
|
|
|
bool intel_engine_add_wait(struct intel_engine_cs *engine,
|
|
struct intel_wait *wait)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
bool armed;
|
|
|
|
spin_lock_irq(&b->rb_lock);
|
|
armed = __intel_engine_add_wait(engine, wait);
|
|
spin_unlock_irq(&b->rb_lock);
|
|
if (armed)
|
|
return armed;
|
|
|
|
/* Make the caller recheck if its request has already started. */
|
|
return intel_engine_has_started(engine, wait->seqno);
|
|
}
|
|
|
|
static inline bool chain_wakeup(struct rb_node *rb, int priority)
|
|
{
|
|
return rb && to_wait(rb)->tsk->prio <= priority;
|
|
}
|
|
|
|
static inline int wakeup_priority(struct intel_breadcrumbs *b,
|
|
struct task_struct *tsk)
|
|
{
|
|
if (tsk == b->signaler)
|
|
return INT_MIN;
|
|
else
|
|
return tsk->prio;
|
|
}
|
|
|
|
static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
|
|
struct intel_wait *wait)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
lockdep_assert_held(&b->rb_lock);
|
|
|
|
if (RB_EMPTY_NODE(&wait->node))
|
|
goto out;
|
|
|
|
if (b->irq_wait == wait) {
|
|
const int priority = wakeup_priority(b, wait->tsk);
|
|
struct rb_node *next;
|
|
|
|
/* We are the current bottom-half. Find the next candidate,
|
|
* the first waiter in the queue on the remaining oldest
|
|
* request. As multiple seqnos may complete in the time it
|
|
* takes us to wake up and find the next waiter, we have to
|
|
* wake up that waiter for it to perform its own coherent
|
|
* completion check.
|
|
*/
|
|
next = rb_next(&wait->node);
|
|
if (chain_wakeup(next, priority)) {
|
|
/* If the next waiter is already complete,
|
|
* wake it up and continue onto the next waiter. So
|
|
* if have a small herd, they will wake up in parallel
|
|
* rather than sequentially, which should reduce
|
|
* the overall latency in waking all the completed
|
|
* clients.
|
|
*
|
|
* However, waking up a chain adds extra latency to
|
|
* the first_waiter. This is undesirable if that
|
|
* waiter is a high priority task.
|
|
*/
|
|
u32 seqno = intel_engine_get_seqno(engine);
|
|
|
|
while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
|
|
struct rb_node *n = rb_next(next);
|
|
|
|
__intel_breadcrumbs_finish(b, to_wait(next));
|
|
next = n;
|
|
if (!chain_wakeup(next, priority))
|
|
break;
|
|
}
|
|
}
|
|
|
|
__intel_breadcrumbs_next(engine, next);
|
|
} else {
|
|
GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
|
|
}
|
|
|
|
GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
|
|
rb_erase(&wait->node, &b->waiters);
|
|
RB_CLEAR_NODE(&wait->node);
|
|
|
|
out:
|
|
GEM_BUG_ON(b->irq_wait == wait);
|
|
GEM_BUG_ON(rb_first(&b->waiters) !=
|
|
(b->irq_wait ? &b->irq_wait->node : NULL));
|
|
}
|
|
|
|
void intel_engine_remove_wait(struct intel_engine_cs *engine,
|
|
struct intel_wait *wait)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
/* Quick check to see if this waiter was already decoupled from
|
|
* the tree by the bottom-half to avoid contention on the spinlock
|
|
* by the herd.
|
|
*/
|
|
if (RB_EMPTY_NODE(&wait->node)) {
|
|
GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);
|
|
return;
|
|
}
|
|
|
|
spin_lock_irq(&b->rb_lock);
|
|
__intel_engine_remove_wait(engine, wait);
|
|
spin_unlock_irq(&b->rb_lock);
|
|
}
|
|
|
|
static void signaler_set_rtpriority(void)
|
|
{
|
|
struct sched_param param = { .sched_priority = 1 };
|
|
|
|
sched_setscheduler_nocheck(current, SCHED_FIFO, ¶m);
|
|
}
|
|
|
|
static int intel_breadcrumbs_signaler(void *arg)
|
|
{
|
|
struct intel_engine_cs *engine = arg;
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
struct i915_request *rq, *n;
|
|
|
|
/* Install ourselves with high priority to reduce signalling latency */
|
|
signaler_set_rtpriority();
|
|
|
|
do {
|
|
bool do_schedule = true;
|
|
LIST_HEAD(list);
|
|
u32 seqno;
|
|
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
if (list_empty(&b->signals))
|
|
goto sleep;
|
|
|
|
/*
|
|
* We are either woken up by the interrupt bottom-half,
|
|
* or by a client adding a new signaller. In both cases,
|
|
* the GPU seqno may have advanced beyond our oldest signal.
|
|
* If it has, propagate the signal, remove the waiter and
|
|
* check again with the next oldest signal. Otherwise we
|
|
* need to wait for a new interrupt from the GPU or for
|
|
* a new client.
|
|
*/
|
|
seqno = intel_engine_get_seqno(engine);
|
|
|
|
spin_lock_irq(&b->rb_lock);
|
|
list_for_each_entry_safe(rq, n, &b->signals, signaling.link) {
|
|
u32 this = rq->signaling.wait.seqno;
|
|
|
|
GEM_BUG_ON(!rq->signaling.wait.seqno);
|
|
|
|
if (!i915_seqno_passed(seqno, this))
|
|
break;
|
|
|
|
if (likely(this == i915_request_global_seqno(rq))) {
|
|
__intel_engine_remove_wait(engine,
|
|
&rq->signaling.wait);
|
|
|
|
rq->signaling.wait.seqno = 0;
|
|
__list_del_entry(&rq->signaling.link);
|
|
|
|
if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
|
|
&rq->fence.flags)) {
|
|
list_add_tail(&rq->signaling.link,
|
|
&list);
|
|
i915_request_get(rq);
|
|
}
|
|
}
|
|
}
|
|
spin_unlock_irq(&b->rb_lock);
|
|
|
|
if (!list_empty(&list)) {
|
|
local_bh_disable();
|
|
list_for_each_entry_safe(rq, n, &list, signaling.link) {
|
|
dma_fence_signal(&rq->fence);
|
|
GEM_BUG_ON(!i915_request_completed(rq));
|
|
i915_request_put(rq);
|
|
}
|
|
local_bh_enable(); /* kick start the tasklets */
|
|
|
|
/*
|
|
* If the engine is saturated we may be continually
|
|
* processing completed requests. This angers the
|
|
* NMI watchdog if we never let anything else
|
|
* have access to the CPU. Let's pretend to be nice
|
|
* and relinquish the CPU if we burn through the
|
|
* entire RT timeslice!
|
|
*/
|
|
do_schedule = need_resched();
|
|
}
|
|
|
|
if (unlikely(do_schedule)) {
|
|
/* Before we sleep, check for a missed seqno */
|
|
if (current->state & TASK_NORMAL &&
|
|
!list_empty(&b->signals) &&
|
|
engine->irq_seqno_barrier &&
|
|
test_and_clear_bit(ENGINE_IRQ_BREADCRUMB,
|
|
&engine->irq_posted)) {
|
|
engine->irq_seqno_barrier(engine);
|
|
intel_engine_wakeup(engine);
|
|
}
|
|
|
|
sleep:
|
|
if (kthread_should_park())
|
|
kthread_parkme();
|
|
|
|
if (unlikely(kthread_should_stop()))
|
|
break;
|
|
|
|
schedule();
|
|
}
|
|
} while (1);
|
|
__set_current_state(TASK_RUNNING);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void insert_signal(struct intel_breadcrumbs *b,
|
|
struct i915_request *request,
|
|
const u32 seqno)
|
|
{
|
|
struct i915_request *iter;
|
|
|
|
lockdep_assert_held(&b->rb_lock);
|
|
|
|
/*
|
|
* A reasonable assumption is that we are called to add signals
|
|
* in sequence, as the requests are submitted for execution and
|
|
* assigned a global_seqno. This will be the case for the majority
|
|
* of internally generated signals (inter-engine signaling).
|
|
*
|
|
* Out of order waiters triggering random signaling enabling will
|
|
* be more problematic, but hopefully rare enough and the list
|
|
* small enough that the O(N) insertion sort is not an issue.
|
|
*/
|
|
|
|
list_for_each_entry_reverse(iter, &b->signals, signaling.link)
|
|
if (i915_seqno_passed(seqno, iter->signaling.wait.seqno))
|
|
break;
|
|
|
|
list_add(&request->signaling.link, &iter->signaling.link);
|
|
}
|
|
|
|
bool intel_engine_enable_signaling(struct i915_request *request, bool wakeup)
|
|
{
|
|
struct intel_engine_cs *engine = request->engine;
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
struct intel_wait *wait = &request->signaling.wait;
|
|
u32 seqno;
|
|
|
|
/*
|
|
* Note that we may be called from an interrupt handler on another
|
|
* device (e.g. nouveau signaling a fence completion causing us
|
|
* to submit a request, and so enable signaling). As such,
|
|
* we need to make sure that all other users of b->rb_lock protect
|
|
* against interrupts, i.e. use spin_lock_irqsave.
|
|
*/
|
|
|
|
/* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
|
|
GEM_BUG_ON(!irqs_disabled());
|
|
lockdep_assert_held(&request->lock);
|
|
|
|
seqno = i915_request_global_seqno(request);
|
|
if (!seqno) /* will be enabled later upon execution */
|
|
return true;
|
|
|
|
GEM_BUG_ON(wait->seqno);
|
|
wait->tsk = b->signaler;
|
|
wait->request = request;
|
|
wait->seqno = seqno;
|
|
|
|
/*
|
|
* Add ourselves into the list of waiters, but registering our
|
|
* bottom-half as the signaller thread. As per usual, only the oldest
|
|
* waiter (not just signaller) is tasked as the bottom-half waking
|
|
* up all completed waiters after the user interrupt.
|
|
*
|
|
* If we are the oldest waiter, enable the irq (after which we
|
|
* must double check that the seqno did not complete).
|
|
*/
|
|
spin_lock(&b->rb_lock);
|
|
insert_signal(b, request, seqno);
|
|
wakeup &= __intel_engine_add_wait(engine, wait);
|
|
spin_unlock(&b->rb_lock);
|
|
|
|
if (wakeup) {
|
|
wake_up_process(b->signaler);
|
|
return !intel_wait_complete(wait);
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
void intel_engine_cancel_signaling(struct i915_request *request)
|
|
{
|
|
struct intel_engine_cs *engine = request->engine;
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
GEM_BUG_ON(!irqs_disabled());
|
|
lockdep_assert_held(&request->lock);
|
|
|
|
if (!READ_ONCE(request->signaling.wait.seqno))
|
|
return;
|
|
|
|
spin_lock(&b->rb_lock);
|
|
__intel_engine_remove_wait(engine, &request->signaling.wait);
|
|
if (fetch_and_zero(&request->signaling.wait.seqno))
|
|
__list_del_entry(&request->signaling.link);
|
|
spin_unlock(&b->rb_lock);
|
|
}
|
|
|
|
int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
struct task_struct *tsk;
|
|
|
|
spin_lock_init(&b->rb_lock);
|
|
spin_lock_init(&b->irq_lock);
|
|
|
|
timer_setup(&b->fake_irq, intel_breadcrumbs_fake_irq, 0);
|
|
timer_setup(&b->hangcheck, intel_breadcrumbs_hangcheck, 0);
|
|
|
|
INIT_LIST_HEAD(&b->signals);
|
|
|
|
/* Spawn a thread to provide a common bottom-half for all signals.
|
|
* As this is an asynchronous interface we cannot steal the current
|
|
* task for handling the bottom-half to the user interrupt, therefore
|
|
* we create a thread to do the coherent seqno dance after the
|
|
* interrupt and then signal the waitqueue (via the dma-buf/fence).
|
|
*/
|
|
tsk = kthread_run(intel_breadcrumbs_signaler, engine,
|
|
"i915/signal:%d", engine->id);
|
|
if (IS_ERR(tsk))
|
|
return PTR_ERR(tsk);
|
|
|
|
b->signaler = tsk;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void cancel_fake_irq(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
del_timer_sync(&b->fake_irq); /* may queue b->hangcheck */
|
|
del_timer_sync(&b->hangcheck);
|
|
clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
|
|
}
|
|
|
|
void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&b->irq_lock, flags);
|
|
|
|
/*
|
|
* Leave the fake_irq timer enabled (if it is running), but clear the
|
|
* bit so that it turns itself off on its next wake up and goes back
|
|
* to the long hangcheck interval if still required.
|
|
*/
|
|
clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
|
|
|
|
if (b->irq_enabled)
|
|
irq_enable(engine);
|
|
else
|
|
irq_disable(engine);
|
|
|
|
/*
|
|
* We set the IRQ_BREADCRUMB bit when we enable the irq presuming the
|
|
* GPU is active and may have already executed the MI_USER_INTERRUPT
|
|
* before the CPU is ready to receive. However, the engine is currently
|
|
* idle (we haven't started it yet), there is no possibility for a
|
|
* missed interrupt as we enabled the irq and so we can clear the
|
|
* immediate wakeup (until a real interrupt arrives for the waiter).
|
|
*/
|
|
clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
|
|
|
|
spin_unlock_irqrestore(&b->irq_lock, flags);
|
|
}
|
|
|
|
void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
/* The engines should be idle and all requests accounted for! */
|
|
WARN_ON(READ_ONCE(b->irq_wait));
|
|
WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
|
|
WARN_ON(!list_empty(&b->signals));
|
|
|
|
if (!IS_ERR_OR_NULL(b->signaler))
|
|
kthread_stop(b->signaler);
|
|
|
|
cancel_fake_irq(engine);
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
|
|
#include "selftests/intel_breadcrumbs.c"
|
|
#endif
|