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969f5ea627
Revisions of the Cortex-A76 CPU prior to r4p0 are affected by an erratum that can prevent interrupts from being taken when single-stepping. This patch implements a software workaround to prevent userspace from effectively being able to disable interrupts. Cc: <stable@vger.kernel.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
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acpi_object_usage.txt | ||
arm-acpi.txt | ||
booting.txt | ||
cpu-feature-registers.txt | ||
elf_hwcaps.txt | ||
hugetlbpage.txt | ||
legacy_instructions.txt | ||
memory.txt | ||
perf.txt | ||
pointer-authentication.txt | ||
silicon-errata.txt | ||
sve.txt | ||
tagged-pointers.txt |