linux-stable/arch/arm64/kernel
Lorenzo Pieralisi 976d7d3f79 arm64: kernel: build MPIDR_EL1 hash function data structure
On ARM64 SMP systems, cores are identified by their MPIDR_EL1 register.
The MPIDR_EL1 guidelines in the ARM ARM do not provide strict enforcement of
MPIDR_EL1 layout, only recommendations that, if followed, split the MPIDR_EL1
on ARM 64 bit platforms in four affinity levels. In multi-cluster
systems like big.LITTLE, if the affinity guidelines are followed, the
MPIDR_EL1 can not be considered a linear index. This means that the
association between logical CPU in the kernel and the HW CPU identifier
becomes somewhat more complicated requiring methods like hashing to
associate a given MPIDR_EL1 to a CPU logical index, in order for the look-up
to be carried out in an efficient and scalable way.

This patch provides a function in the kernel that starting from the
cpu_logical_map, implement collision-free hashing of MPIDR_EL1 values by
checking all significative bits of MPIDR_EL1 affinity level bitfields.
The hashing can then be carried out through bits shifting and ORing; the
resulting hash algorithm is a collision-free though not minimal hash that can
be executed with few assembly instructions. The mpidr_el1 is filtered through a
mpidr mask that is built by checking all bits that toggle in the set of
MPIDR_EL1s corresponding to possible CPUs. Bits that do not toggle do not
carry information so they do not contribute to the resulting hash.

Pseudo code:

/* check all bits that toggle, so they are required */
for (i = 1, mpidr_el1_mask = 0; i < num_possible_cpus(); i++)
	mpidr_el1_mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));

/*
 * Build shifts to be applied to aff0, aff1, aff2, aff3 values to hash the
 * mpidr_el1
 * fls() returns the last bit set in a word, 0 if none
 * ffs() returns the first bit set in a word, 0 if none
 */
fs0 = mpidr_el1_mask[7:0] ? ffs(mpidr_el1_mask[7:0]) - 1 : 0;
fs1 = mpidr_el1_mask[15:8] ? ffs(mpidr_el1_mask[15:8]) - 1 : 0;
fs2 = mpidr_el1_mask[23:16] ? ffs(mpidr_el1_mask[23:16]) - 1 : 0;
fs3 = mpidr_el1_mask[39:32] ? ffs(mpidr_el1_mask[39:32]) - 1 : 0;
ls0 = fls(mpidr_el1_mask[7:0]);
ls1 = fls(mpidr_el1_mask[15:8]);
ls2 = fls(mpidr_el1_mask[23:16]);
ls3 = fls(mpidr_el1_mask[39:32]);
bits0 = ls0 - fs0;
bits1 = ls1 - fs1;
bits2 = ls2 - fs2;
bits3 = ls3 - fs3;
aff0_shift = fs0;
aff1_shift = 8 + fs1 - bits0;
aff2_shift = 16 + fs2 - (bits0 + bits1);
aff3_shift = 32 + fs3 - (bits0 + bits1 + bits2);
u32 hash(u64 mpidr_el1) {
	u32 l[4];
	u64 mpidr_el1_masked = mpidr_el1 & mpidr_el1_mask;
	l[0] = mpidr_el1_masked & 0xff;
	l[1] = mpidr_el1_masked & 0xff00;
	l[2] = mpidr_el1_masked & 0xff0000;
	l[3] = mpidr_el1_masked & 0xff00000000;
	return (l[0] >> aff0_shift | l[1] >> aff1_shift | l[2] >> aff2_shift |
		l[3] >> aff3_shift);
}

The hashing algorithm relies on the inherent properties set in the ARM ARM
recommendations for the MPIDR_EL1. Exotic configurations, where for instance
the MPIDR_EL1 values at a given affinity level have large holes, can end up
requiring big hash tables since the compression of values that can be achieved
through shifting is somewhat crippled when holes are present. Kernel warns if
the number of buckets of the resulting hash table exceeds the number of
possible CPUs by a factor of 4, which is a symptom of a very sparse HW
MPIDR_EL1 configuration.

The hash algorithm is quite simple and can easily be implemented in assembly
code, to be used in code paths where the kernel virtual address space is
not set-up (ie cpu_resume) and instruction and data fetches are strongly
ordered so code must be compact and must carry out few data accesses.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-12-16 17:17:30 +00:00
..
vdso arm64: vdso: remove broken, redundant sequence counting for timezones 2013-01-10 10:43:43 +00:00
.gitignore arm64: Build infrastructure 2012-09-17 13:42:21 +01:00
arm64ksyms.c arm64: Export __copy_in_user() to modules 2013-10-24 15:47:19 +01:00
asm-offsets.c arm64: KVM: Kconfig integration 2013-07-04 14:40:26 +02:00
cpu_ops.c arm64: Slightly improve the warning on CPU0 enable-method 2013-10-31 16:37:26 +00:00
cputable.c arm64: add CPU_HOTPLUG infrastructure 2013-10-25 11:33:21 +01:00
debug-monitors.c arm64: debug: make aarch32 bkpt checking endian clean 2013-11-28 18:01:29 +00:00
early_printk.c arm64: Fix duplicate definition of early_console 2013-05-13 11:44:53 +01:00
entry-fpsimd.S arm64: move FP-SIMD save/restore code to a macro 2012-12-05 11:26:50 +00:00
entry.S arm64: let the core code deal with preempt_count 2013-11-25 16:44:04 +00:00
fpsimd.c arm64: fix possible invalid FPSIMD initialization state 2013-09-27 18:21:37 +01:00
head.S arm64: kernel: add code to set cpu boot mode to secondary_entry shim 2013-12-06 17:21:51 +00:00
hw_breakpoint.c ARM: 7862/1: pcpu: replace __get_cpu_var_uses 2013-10-29 11:06:27 +00:00
hyp-stub.S arm64: add hypervisor stub 2012-12-05 11:26:49 +00:00
io.c arm64: Device specific operations 2012-09-17 13:42:04 +01:00
irq.c arm64: add CPU_HOTPLUG infrastructure 2013-10-25 11:33:21 +01:00
kuser32.S arm64: update 32-bit kuser helpers to ARMv8 2013-10-28 10:40:28 +00:00
Makefile arm64: reorganise smp_enable_ops 2013-10-25 11:33:20 +01:00
module.c mm/arch: use NUMA_NO_NODE 2013-11-13 12:09:05 +09:00
perf_event.c Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm 2013-11-14 08:51:29 +09:00
process.c arm64: add CPU_HOTPLUG infrastructure 2013-10-25 11:33:21 +01:00
psci.c arm64: add PSCI CPU_OFF-based hotplug support 2013-10-25 11:33:21 +01:00
ptrace.c arm64: ptrace: fix compat registes get/set to be endian clean 2013-11-28 18:01:28 +00:00
setup.c arm64: kernel: build MPIDR_EL1 hash function data structure 2013-12-16 17:17:30 +00:00
signal.c arm64: switch to generic sigaltstack 2013-02-14 09:17:29 -05:00
signal32.c Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs 2013-11-13 15:34:18 +09:00
smp.c arm64: Unmask asynchronous aborts when in kernel mode 2013-11-25 16:44:05 +00:00
smp_spin_table.c arm64: big-endian: write CPU holding pen address as LE 2013-10-25 15:59:42 +01:00
stacktrace.c arm64: Exception handling 2012-09-17 10:24:46 +01:00
sys.c arm64: switch to generic sigaltstack 2013-02-14 09:17:29 -05:00
sys32.S arm64: compat: correct register concatenation for syscall wrappers 2013-10-25 15:59:36 +01:00
sys_compat.c compat: generic compat_sys_sched_rr_get_interval() implementation 2012-12-17 17:15:18 -08:00
time.c arch_timer: Move to generic sched_clock framework 2013-10-09 16:54:10 -07:00
traps.c arm64: debug: consolidate software breakpoint handlers 2013-06-12 11:23:02 +01:00
vdso.c arm64: big-endian: don't treat code as data when copying sigret code 2013-10-25 15:59:37 +01:00
vmlinux.lds.S arm64: use generic RW_DATA_SECTION macro in linker script 2013-11-04 18:17:25 +00:00