mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-04 16:15:11 +00:00
dc1d99342d
In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters mainly are PCIe and USB. Different with MM IOMMU, all these masters connect with IOMMU directly, there is no mediatek,larbs property for infra IOMMU. Another thing is about PCIe ports. currently the function "of_iommu_configure_dev_id" only support the id number is 1, But our PCIe have two ports, one is for reading and the other is for writing. see more about the PCIe patch in this patchset. Thus, I only list the reading id here and add the other id in our driver. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20220503071427.2285-3-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
17 lines
470 B
C
17 lines
470 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright (c) 2020 MediaTek Inc.
|
|
* Author: Yong Wu <yong.wu@mediatek.com>
|
|
*/
|
|
#ifndef __DT_BINDINGS_MEMORY_MTK_MEMORY_PORT_H_
|
|
#define __DT_BINDINGS_MEMORY_MTK_MEMORY_PORT_H_
|
|
|
|
#define MTK_LARB_NR_MAX 32
|
|
|
|
#define MTK_M4U_ID(larb, port) (((larb) << 5) | (port))
|
|
#define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x1f)
|
|
#define MTK_M4U_TO_PORT(id) ((id) & 0x1f)
|
|
|
|
#define MTK_IFAIOMMU_PERI_ID(port) MTK_M4U_ID(0, port)
|
|
|
|
#endif
|