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![Mikael Starvik](/assets/img/avatar_default.png)
New CRIS sub architecture named v32. From: Dave Jones <davej@redhat.com> Fix swapped kmalloc args Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
73 lines
3.3 KiB
C
73 lines
3.3 KiB
C
#ifndef _ASM_CRIS_ELF_H
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#define _ASM_CRIS_ELF_H
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#define ELF_CORE_EFLAGS EF_CRIS_VARIANT_V32
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) \
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((x)->e_machine == EM_CRIS \
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&& ((((x)->e_flags & EF_CRIS_VARIANT_MASK) == EF_CRIS_VARIANT_V32 \
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|| (((x)->e_flags & EF_CRIS_VARIANT_MASK) == EF_CRIS_VARIANT_COMMON_V10_V32))))
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/* CRISv32 ELF register definitions. */
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#include <asm/ptrace.h>
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/* Explicitly zero out registers to increase determinism. */
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#define ELF_PLAT_INIT(_r, load_addr) do { \
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(_r)->r13 = 0; (_r)->r12 = 0; (_r)->r11 = 0; (_r)->r10 = 0; \
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(_r)->r9 = 0; (_r)->r8 = 0; (_r)->r7 = 0; (_r)->r6 = 0; \
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(_r)->r5 = 0; (_r)->r4 = 0; (_r)->r3 = 0; (_r)->r2 = 0; \
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(_r)->r1 = 0; (_r)->r0 = 0; (_r)->mof = 0; (_r)->srp = 0; \
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(_r)->acr = 0; \
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} while (0)
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/*
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* An executable for which elf_read_implies_exec() returns TRUE will
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* have the READ_IMPLIES_EXEC personality flag set automatically.
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*/
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#define elf_read_implies_exec_binary(ex, have_pt_gnu_stack) (!(have_pt_gnu_stack))
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/*
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* This is basically a pt_regs with the additional definition
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* of the stack pointer since it's needed in a core dump.
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* pr_regs is a elf_gregset_t and should be filled according
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* to the layout of user_regs_struct.
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*/
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#define ELF_CORE_COPY_REGS(pr_reg, regs) \
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pr_reg[0] = regs->r0; \
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pr_reg[1] = regs->r1; \
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pr_reg[2] = regs->r2; \
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pr_reg[3] = regs->r3; \
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pr_reg[4] = regs->r4; \
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pr_reg[5] = regs->r5; \
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pr_reg[6] = regs->r6; \
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pr_reg[7] = regs->r7; \
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pr_reg[8] = regs->r8; \
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pr_reg[9] = regs->r9; \
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pr_reg[10] = regs->r10; \
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pr_reg[11] = regs->r11; \
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pr_reg[12] = regs->r12; \
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pr_reg[13] = regs->r13; \
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pr_reg[14] = rdusp(); /* SP */ \
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pr_reg[15] = regs->acr; /* ACR */ \
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pr_reg[16] = 0; /* BZ */ \
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pr_reg[17] = rdvr(); /* VR */ \
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pr_reg[18] = 0; /* PID */ \
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pr_reg[19] = regs->srs; /* SRS */ \
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pr_reg[20] = 0; /* WZ */ \
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pr_reg[21] = regs->exs; /* EXS */ \
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pr_reg[22] = regs->eda; /* EDA */ \
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pr_reg[23] = regs->mof; /* MOF */ \
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pr_reg[24] = 0; /* DZ */ \
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pr_reg[25] = 0; /* EBP */ \
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pr_reg[26] = regs->erp; /* ERP */ \
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pr_reg[27] = regs->srp; /* SRP */ \
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pr_reg[28] = 0; /* NRP */ \
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pr_reg[29] = regs->ccs; /* CCS */ \
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pr_reg[30] = rdusp(); /* USP */ \
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pr_reg[31] = regs->spc; /* SPC */ \
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#endif /* _ASM_CRIS_ELF_H */
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