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Asymmetric systems may not offer the same level of userspace ISA support across all CPUs, meaning that some applications cannot be executed by some CPUs. As a concrete example, upcoming arm64 big.LITTLE designs do not feature support for 32-bit applications on both clusters. On such a system, we must take care not to migrate a task to an unsupported CPU when forcefully moving tasks in select_fallback_rq() in response to a CPU hot-unplug operation. Introduce a task_cpu_possible_mask() hook which, given a task argument, allows an architecture to return a cpumask of CPUs that are capable of executing that task. The default implementation returns the cpu_possible_mask, since sane machines do not suffer from per-cpu ISA limitations that affect scheduling. The new mask is used when selecting the fallback runqueue as a last resort before forcing a migration to the first active CPU. Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Valentin Schneider <Valentin.Schneider@arm.com> Reviewed-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20210730112443.23245-2-will@kernel.org
31 lines
855 B
C
31 lines
855 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _LINUX_MMU_CONTEXT_H
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#define _LINUX_MMU_CONTEXT_H
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#include <asm/mmu_context.h>
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#include <asm/mmu.h>
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/* Architectures that care about IRQ state in switch_mm can override this. */
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#ifndef switch_mm_irqs_off
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# define switch_mm_irqs_off switch_mm
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#endif
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#ifndef leave_mm
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static inline void leave_mm(int cpu) { }
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#endif
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/*
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* CPUs that are capable of running user task @p. Must contain at least one
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* active CPU. It is assumed that the kernel can run on all CPUs, so calling
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* this for a kernel thread is pointless.
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*
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* By default, we assume a sane, homogeneous system.
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*/
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#ifndef task_cpu_possible_mask
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# define task_cpu_possible_mask(p) cpu_possible_mask
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# define task_cpu_possible(cpu, p) true
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#else
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# define task_cpu_possible(cpu, p) cpumask_test_cpu((cpu), task_cpu_possible_mask(p))
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#endif
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#endif
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