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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-30 16:07:39 +00:00
060b8845e6
Signed-off-by: Yani Ioannou <yani.ioannou@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
1280 lines
32 KiB
C
1280 lines
32 KiB
C
/*
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* SGI GBE frame buffer driver
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*
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* Copyright (C) 1999 Silicon Graphics, Inc. - Jeffrey Newquist
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* Copyright (C) 2002 Vivien Chappelier <vivien.chappelier@linux-mips.org>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/config.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/errno.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#ifdef CONFIG_X86
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#include <asm/mtrr.h>
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#endif
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#ifdef CONFIG_MIPS
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#include <asm/addrspace.h>
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#endif
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#include <asm/byteorder.h>
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#include <asm/io.h>
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#include <asm/tlbflush.h>
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#include <video/gbe.h>
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static struct sgi_gbe *gbe;
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struct gbefb_par {
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struct fb_var_screeninfo var;
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struct gbe_timing_info timing;
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int valid;
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};
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#ifdef CONFIG_SGI_IP32
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#define GBE_BASE 0x16000000 /* SGI O2 */
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#endif
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#ifdef CONFIG_X86_VISWS
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#define GBE_BASE 0xd0000000 /* SGI Visual Workstation */
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#endif
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/* macro for fastest write-though access to the framebuffer */
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#ifdef CONFIG_MIPS
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#ifdef CONFIG_CPU_R10000
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#define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_UNCACHED_ACCELERATED)
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#else
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#define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_CACHABLE_NO_WA)
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#endif
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#endif
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#ifdef CONFIG_X86
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#define pgprot_fb(_prot) ((_prot) | _PAGE_PCD)
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#endif
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/*
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* RAM we reserve for the frame buffer. This defines the maximum screen
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* size
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*/
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#if CONFIG_FB_GBE_MEM > 8
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#error GBE Framebuffer cannot use more than 8MB of memory
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#endif
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#define TILE_SHIFT 16
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#define TILE_SIZE (1 << TILE_SHIFT)
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#define TILE_MASK (TILE_SIZE - 1)
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static unsigned int gbe_mem_size = CONFIG_FB_GBE_MEM * 1024*1024;
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static void *gbe_mem;
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static dma_addr_t gbe_dma_addr;
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unsigned long gbe_mem_phys;
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static struct {
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uint16_t *cpu;
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dma_addr_t dma;
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} gbe_tiles;
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static int gbe_revision;
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static int ypan, ywrap;
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static uint32_t pseudo_palette[256];
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static char *mode_option __initdata = NULL;
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/* default CRT mode */
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static struct fb_var_screeninfo default_var_CRT __initdata = {
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/* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
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.xres = 640,
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.yres = 480,
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.xres_virtual = 640,
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.yres_virtual = 480,
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.xoffset = 0,
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.yoffset = 0,
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.bits_per_pixel = 8,
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.grayscale = 0,
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.red = { 0, 8, 0 },
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.green = { 0, 8, 0 },
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.blue = { 0, 8, 0 },
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.transp = { 0, 0, 0 },
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.nonstd = 0,
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.activate = 0,
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.height = -1,
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.width = -1,
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.accel_flags = 0,
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.pixclock = 39722, /* picoseconds */
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.left_margin = 48,
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.right_margin = 16,
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.upper_margin = 33,
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.lower_margin = 10,
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.hsync_len = 96,
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.vsync_len = 2,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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/* default LCD mode */
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static struct fb_var_screeninfo default_var_LCD __initdata = {
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/* 1600x1024, 8 bpp */
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.xres = 1600,
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.yres = 1024,
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.xres_virtual = 1600,
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.yres_virtual = 1024,
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.xoffset = 0,
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.yoffset = 0,
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.bits_per_pixel = 8,
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.grayscale = 0,
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.red = { 0, 8, 0 },
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.green = { 0, 8, 0 },
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.blue = { 0, 8, 0 },
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.transp = { 0, 0, 0 },
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.nonstd = 0,
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.activate = 0,
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.height = -1,
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.width = -1,
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.accel_flags = 0,
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.pixclock = 9353,
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.left_margin = 20,
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.right_margin = 30,
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.upper_margin = 37,
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.lower_margin = 3,
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.hsync_len = 20,
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.vsync_len = 3,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED
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};
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/* default modedb mode */
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/* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */
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static struct fb_videomode default_mode_CRT __initdata = {
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.refresh = 60,
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.xres = 640,
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.yres = 480,
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.pixclock = 39722,
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.left_margin = 48,
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.right_margin = 16,
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.upper_margin = 33,
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.lower_margin = 10,
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.hsync_len = 96,
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.vsync_len = 2,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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/* 1600x1024 SGI flatpanel 1600sw */
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static struct fb_videomode default_mode_LCD __initdata = {
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/* 1600x1024, 8 bpp */
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.xres = 1600,
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.yres = 1024,
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.pixclock = 9353,
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.left_margin = 20,
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.right_margin = 30,
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.upper_margin = 37,
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.lower_margin = 3,
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.hsync_len = 20,
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.vsync_len = 3,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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struct fb_videomode *default_mode = &default_mode_CRT;
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struct fb_var_screeninfo *default_var = &default_var_CRT;
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static int flat_panel_enabled = 0;
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static void gbe_reset(void)
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{
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/* Turn on dotclock PLL */
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gbe->ctrlstat = 0x300aa000;
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}
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/*
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* Function: gbe_turn_off
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* Parameters: (None)
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* Description: This should turn off the monitor and gbe. This is used
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* when switching between the serial console and the graphics
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* console.
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*/
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void gbe_turn_off(void)
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{
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int i;
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unsigned int val, x, y, vpixen_off;
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/* check if pixel counter is on */
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val = gbe->vt_xy;
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if (GET_GBE_FIELD(VT_XY, FREEZE, val) == 1)
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return;
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/* turn off DMA */
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val = gbe->ovr_control;
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SET_GBE_FIELD(OVR_CONTROL, OVR_DMA_ENABLE, val, 0);
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gbe->ovr_control = val;
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udelay(1000);
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val = gbe->frm_control;
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SET_GBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, val, 0);
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gbe->frm_control = val;
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udelay(1000);
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val = gbe->did_control;
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SET_GBE_FIELD(DID_CONTROL, DID_DMA_ENABLE, val, 0);
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gbe->did_control = val;
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udelay(1000);
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/* We have to wait through two vertical retrace periods before
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* the pixel DMA is turned off for sure. */
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for (i = 0; i < 10000; i++) {
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val = gbe->frm_inhwctrl;
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if (GET_GBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, val)) {
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udelay(10);
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} else {
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val = gbe->ovr_inhwctrl;
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if (GET_GBE_FIELD(OVR_INHWCTRL, OVR_DMA_ENABLE, val)) {
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udelay(10);
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} else {
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val = gbe->did_inhwctrl;
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if (GET_GBE_FIELD(DID_INHWCTRL, DID_DMA_ENABLE, val)) {
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udelay(10);
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} else
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break;
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}
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}
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: turn off DMA timed out\n");
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/* wait for vpixen_off */
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val = gbe->vt_vpixen;
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vpixen_off = GET_GBE_FIELD(VT_VPIXEN, VPIXEN_OFF, val);
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for (i = 0; i < 100000; i++) {
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val = gbe->vt_xy;
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x = GET_GBE_FIELD(VT_XY, X, val);
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y = GET_GBE_FIELD(VT_XY, Y, val);
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if (y < vpixen_off)
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break;
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udelay(1);
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}
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if (i == 100000)
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printk(KERN_ERR
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"gbefb: wait for vpixen_off timed out\n");
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for (i = 0; i < 10000; i++) {
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val = gbe->vt_xy;
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x = GET_GBE_FIELD(VT_XY, X, val);
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y = GET_GBE_FIELD(VT_XY, Y, val);
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if (y > vpixen_off)
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break;
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udelay(1);
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: wait for vpixen_off timed out\n");
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/* turn off pixel counter */
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val = 0;
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SET_GBE_FIELD(VT_XY, FREEZE, val, 1);
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gbe->vt_xy = val;
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udelay(10000);
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for (i = 0; i < 10000; i++) {
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val = gbe->vt_xy;
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if (GET_GBE_FIELD(VT_XY, FREEZE, val) != 1)
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udelay(10);
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else
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break;
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: turn off pixel clock timed out\n");
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/* turn off dot clock */
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val = gbe->dotclock;
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SET_GBE_FIELD(DOTCLK, RUN, val, 0);
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gbe->dotclock = val;
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udelay(10000);
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for (i = 0; i < 10000; i++) {
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val = gbe->dotclock;
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if (GET_GBE_FIELD(DOTCLK, RUN, val))
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udelay(10);
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else
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break;
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: turn off dotclock timed out\n");
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/* reset the frame DMA FIFO */
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val = gbe->frm_size_tile;
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SET_GBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, val, 1);
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gbe->frm_size_tile = val;
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SET_GBE_FIELD(FRM_SIZE_TILE, FRM_FIFO_RESET, val, 0);
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gbe->frm_size_tile = val;
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}
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static void gbe_turn_on(void)
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{
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unsigned int val, i;
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/*
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* Check if pixel counter is off, for unknown reason this
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* code hangs Visual Workstations
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*/
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if (gbe_revision < 2) {
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val = gbe->vt_xy;
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if (GET_GBE_FIELD(VT_XY, FREEZE, val) == 0)
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return;
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}
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/* turn on dot clock */
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val = gbe->dotclock;
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SET_GBE_FIELD(DOTCLK, RUN, val, 1);
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gbe->dotclock = val;
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udelay(10000);
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for (i = 0; i < 10000; i++) {
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val = gbe->dotclock;
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if (GET_GBE_FIELD(DOTCLK, RUN, val) != 1)
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udelay(10);
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else
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break;
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: turn on dotclock timed out\n");
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/* turn on pixel counter */
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val = 0;
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SET_GBE_FIELD(VT_XY, FREEZE, val, 0);
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gbe->vt_xy = val;
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udelay(10000);
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for (i = 0; i < 10000; i++) {
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val = gbe->vt_xy;
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if (GET_GBE_FIELD(VT_XY, FREEZE, val))
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udelay(10);
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else
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break;
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: turn on pixel clock timed out\n");
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/* turn on DMA */
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val = gbe->frm_control;
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SET_GBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, val, 1);
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gbe->frm_control = val;
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udelay(1000);
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for (i = 0; i < 10000; i++) {
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val = gbe->frm_inhwctrl;
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if (GET_GBE_FIELD(FRM_INHWCTRL, FRM_DMA_ENABLE, val) != 1)
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udelay(10);
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else
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break;
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}
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if (i == 10000)
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printk(KERN_ERR "gbefb: turn on DMA timed out\n");
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}
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/*
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* Blank the display.
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*/
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static int gbefb_blank(int blank, struct fb_info *info)
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{
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/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
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switch (blank) {
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case FB_BLANK_UNBLANK: /* unblank */
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gbe_turn_on();
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break;
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case FB_BLANK_NORMAL: /* blank */
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gbe_turn_off();
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break;
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default:
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/* Nothing */
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break;
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}
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return 0;
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}
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/*
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* Setup flatpanel related registers.
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*/
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static void gbefb_setup_flatpanel(struct gbe_timing_info *timing)
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{
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int fp_wid, fp_hgt, fp_vbs, fp_vbe;
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u32 outputVal = 0;
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SET_GBE_FIELD(VT_FLAGS, HDRV_INVERT, outputVal,
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(timing->flags & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1);
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SET_GBE_FIELD(VT_FLAGS, VDRV_INVERT, outputVal,
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(timing->flags & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1);
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gbe->vt_flags = outputVal;
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/* Turn on the flat panel */
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fp_wid = 1600;
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fp_hgt = 1024;
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fp_vbs = 0;
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fp_vbe = 1600;
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timing->pll_m = 4;
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timing->pll_n = 1;
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timing->pll_p = 0;
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outputVal = 0;
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SET_GBE_FIELD(FP_DE, ON, outputVal, fp_vbs);
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SET_GBE_FIELD(FP_DE, OFF, outputVal, fp_vbe);
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gbe->fp_de = outputVal;
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outputVal = 0;
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SET_GBE_FIELD(FP_HDRV, OFF, outputVal, fp_wid);
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gbe->fp_hdrv = outputVal;
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outputVal = 0;
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SET_GBE_FIELD(FP_VDRV, ON, outputVal, 1);
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SET_GBE_FIELD(FP_VDRV, OFF, outputVal, fp_hgt + 1);
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gbe->fp_vdrv = outputVal;
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}
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struct gbe_pll_info {
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int clock_rate;
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int fvco_min;
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int fvco_max;
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};
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static struct gbe_pll_info gbe_pll_table[2] = {
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{ 20, 80, 220 },
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{ 27, 80, 220 },
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};
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static int compute_gbe_timing(struct fb_var_screeninfo *var,
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struct gbe_timing_info *timing)
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{
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int pll_m, pll_n, pll_p, error, best_m, best_n, best_p, best_error;
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int pixclock;
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struct gbe_pll_info *gbe_pll;
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if (gbe_revision < 2)
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gbe_pll = &gbe_pll_table[0];
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else
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gbe_pll = &gbe_pll_table[1];
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/* Determine valid resolution and timing
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* GBE crystal runs at 20Mhz or 27Mhz
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* pll_m, pll_n, pll_p define the following frequencies
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* fvco = pll_m * 20Mhz / pll_n
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* fout = fvco / (2**pll_p) */
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best_error = 1000000000;
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best_n = best_m = best_p = 0;
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for (pll_p = 0; pll_p < 4; pll_p++)
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for (pll_m = 1; pll_m < 256; pll_m++)
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for (pll_n = 1; pll_n < 64; pll_n++) {
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pixclock = (1000000 / gbe_pll->clock_rate) *
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(pll_n << pll_p) / pll_m;
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error = var->pixclock - pixclock;
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if (error < 0)
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error = -error;
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if (error < best_error &&
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pll_m / pll_n >
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gbe_pll->fvco_min / gbe_pll->clock_rate &&
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pll_m / pll_n <
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gbe_pll->fvco_max / gbe_pll->clock_rate) {
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best_error = error;
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best_m = pll_m;
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best_n = pll_n;
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best_p = pll_p;
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}
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}
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if (!best_n || !best_m)
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return -EINVAL; /* Resolution to high */
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pixclock = (1000000 / gbe_pll->clock_rate) *
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(best_n << best_p) / best_m;
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/* set video timing information */
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if (timing) {
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timing->width = var->xres;
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timing->height = var->yres;
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timing->pll_m = best_m;
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timing->pll_n = best_n;
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timing->pll_p = best_p;
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timing->cfreq = gbe_pll->clock_rate * 1000 * timing->pll_m /
|
|
(timing->pll_n << timing->pll_p);
|
|
timing->htotal = var->left_margin + var->xres +
|
|
var->right_margin + var->hsync_len;
|
|
timing->vtotal = var->upper_margin + var->yres +
|
|
var->lower_margin + var->vsync_len;
|
|
timing->fields_sec = 1000 * timing->cfreq / timing->htotal *
|
|
1000 / timing->vtotal;
|
|
timing->hblank_start = var->xres;
|
|
timing->vblank_start = var->yres;
|
|
timing->hblank_end = timing->htotal;
|
|
timing->hsync_start = var->xres + var->right_margin + 1;
|
|
timing->hsync_end = timing->hsync_start + var->hsync_len;
|
|
timing->vblank_end = timing->vtotal;
|
|
timing->vsync_start = var->yres + var->lower_margin + 1;
|
|
timing->vsync_end = timing->vsync_start + var->vsync_len;
|
|
}
|
|
|
|
return pixclock;
|
|
}
|
|
|
|
static void gbe_set_timing_info(struct gbe_timing_info *timing)
|
|
{
|
|
int temp;
|
|
unsigned int val;
|
|
|
|
/* setup dot clock PLL */
|
|
val = 0;
|
|
SET_GBE_FIELD(DOTCLK, M, val, timing->pll_m - 1);
|
|
SET_GBE_FIELD(DOTCLK, N, val, timing->pll_n - 1);
|
|
SET_GBE_FIELD(DOTCLK, P, val, timing->pll_p);
|
|
SET_GBE_FIELD(DOTCLK, RUN, val, 0); /* do not start yet */
|
|
gbe->dotclock = val;
|
|
udelay(10000);
|
|
|
|
/* setup pixel counter */
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_XYMAX, MAXX, val, timing->htotal);
|
|
SET_GBE_FIELD(VT_XYMAX, MAXY, val, timing->vtotal);
|
|
gbe->vt_xymax = val;
|
|
|
|
/* setup video timing signals */
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_VSYNC, VSYNC_ON, val, timing->vsync_start);
|
|
SET_GBE_FIELD(VT_VSYNC, VSYNC_OFF, val, timing->vsync_end);
|
|
gbe->vt_vsync = val;
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_HSYNC, HSYNC_ON, val, timing->hsync_start);
|
|
SET_GBE_FIELD(VT_HSYNC, HSYNC_OFF, val, timing->hsync_end);
|
|
gbe->vt_hsync = val;
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_VBLANK, VBLANK_ON, val, timing->vblank_start);
|
|
SET_GBE_FIELD(VT_VBLANK, VBLANK_OFF, val, timing->vblank_end);
|
|
gbe->vt_vblank = val;
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_HBLANK, HBLANK_ON, val,
|
|
timing->hblank_start - 5);
|
|
SET_GBE_FIELD(VT_HBLANK, HBLANK_OFF, val,
|
|
timing->hblank_end - 3);
|
|
gbe->vt_hblank = val;
|
|
|
|
/* setup internal timing signals */
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_VCMAP, VCMAP_ON, val, timing->vblank_start);
|
|
SET_GBE_FIELD(VT_VCMAP, VCMAP_OFF, val, timing->vblank_end);
|
|
gbe->vt_vcmap = val;
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_HCMAP, HCMAP_ON, val, timing->hblank_start);
|
|
SET_GBE_FIELD(VT_HCMAP, HCMAP_OFF, val, timing->hblank_end);
|
|
gbe->vt_hcmap = val;
|
|
|
|
val = 0;
|
|
temp = timing->vblank_start - timing->vblank_end - 1;
|
|
if (temp > 0)
|
|
temp = -temp;
|
|
|
|
if (flat_panel_enabled)
|
|
gbefb_setup_flatpanel(timing);
|
|
|
|
SET_GBE_FIELD(DID_START_XY, DID_STARTY, val, (u32) temp);
|
|
if (timing->hblank_end >= 20)
|
|
SET_GBE_FIELD(DID_START_XY, DID_STARTX, val,
|
|
timing->hblank_end - 20);
|
|
else
|
|
SET_GBE_FIELD(DID_START_XY, DID_STARTX, val,
|
|
timing->htotal - (20 - timing->hblank_end));
|
|
gbe->did_start_xy = val;
|
|
|
|
val = 0;
|
|
SET_GBE_FIELD(CRS_START_XY, CRS_STARTY, val, (u32) (temp + 1));
|
|
if (timing->hblank_end >= GBE_CRS_MAGIC)
|
|
SET_GBE_FIELD(CRS_START_XY, CRS_STARTX, val,
|
|
timing->hblank_end - GBE_CRS_MAGIC);
|
|
else
|
|
SET_GBE_FIELD(CRS_START_XY, CRS_STARTX, val,
|
|
timing->htotal - (GBE_CRS_MAGIC -
|
|
timing->hblank_end));
|
|
gbe->crs_start_xy = val;
|
|
|
|
val = 0;
|
|
SET_GBE_FIELD(VC_START_XY, VC_STARTY, val, (u32) temp);
|
|
SET_GBE_FIELD(VC_START_XY, VC_STARTX, val, timing->hblank_end - 4);
|
|
gbe->vc_start_xy = val;
|
|
|
|
val = 0;
|
|
temp = timing->hblank_end - GBE_PIXEN_MAGIC_ON;
|
|
if (temp < 0)
|
|
temp += timing->htotal; /* allow blank to wrap around */
|
|
|
|
SET_GBE_FIELD(VT_HPIXEN, HPIXEN_ON, val, temp);
|
|
SET_GBE_FIELD(VT_HPIXEN, HPIXEN_OFF, val,
|
|
((temp + timing->width -
|
|
GBE_PIXEN_MAGIC_OFF) % timing->htotal));
|
|
gbe->vt_hpixen = val;
|
|
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_VPIXEN, VPIXEN_ON, val, timing->vblank_end);
|
|
SET_GBE_FIELD(VT_VPIXEN, VPIXEN_OFF, val, timing->vblank_start);
|
|
gbe->vt_vpixen = val;
|
|
|
|
/* turn off sync on green */
|
|
val = 0;
|
|
SET_GBE_FIELD(VT_FLAGS, SYNC_LOW, val, 1);
|
|
gbe->vt_flags = val;
|
|
}
|
|
|
|
/*
|
|
* Set the hardware according to 'par'.
|
|
*/
|
|
|
|
static int gbefb_set_par(struct fb_info *info)
|
|
{
|
|
int i;
|
|
unsigned int val;
|
|
int wholeTilesX, partTilesX, maxPixelsPerTileX;
|
|
int height_pix;
|
|
int xpmax, ypmax; /* Monitor resolution */
|
|
int bytesPerPixel; /* Bytes per pixel */
|
|
struct gbefb_par *par = (struct gbefb_par *) info->par;
|
|
|
|
compute_gbe_timing(&info->var, &par->timing);
|
|
|
|
bytesPerPixel = info->var.bits_per_pixel / 8;
|
|
info->fix.line_length = info->var.xres_virtual * bytesPerPixel;
|
|
xpmax = par->timing.width;
|
|
ypmax = par->timing.height;
|
|
|
|
/* turn off GBE */
|
|
gbe_turn_off();
|
|
|
|
/* set timing info */
|
|
gbe_set_timing_info(&par->timing);
|
|
|
|
/* initialize DIDs */
|
|
val = 0;
|
|
switch (bytesPerPixel) {
|
|
case 1:
|
|
SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_I8);
|
|
break;
|
|
case 2:
|
|
SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_ARGB5);
|
|
break;
|
|
case 4:
|
|
SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_RGB8);
|
|
break;
|
|
}
|
|
SET_GBE_FIELD(WID, BUF, val, GBE_BMODE_BOTH);
|
|
|
|
for (i = 0; i < 32; i++)
|
|
gbe->mode_regs[i] = val;
|
|
|
|
/* Initialize interrupts */
|
|
gbe->vt_intr01 = 0xffffffff;
|
|
gbe->vt_intr23 = 0xffffffff;
|
|
|
|
/* HACK:
|
|
The GBE hardware uses a tiled memory to screen mapping. Tiles are
|
|
blocks of 512x128, 256x128 or 128x128 pixels, respectively for 8bit,
|
|
16bit and 32 bit modes (64 kB). They cover the screen with partial
|
|
tiles on the right and/or bottom of the screen if needed.
|
|
For exemple in 640x480 8 bit mode the mapping is:
|
|
|
|
<-------- 640 ----->
|
|
<---- 512 ----><128|384 offscreen>
|
|
^ ^
|
|
| 128 [tile 0] [tile 1]
|
|
| v
|
|
^
|
|
4 128 [tile 2] [tile 3]
|
|
8 v
|
|
0 ^
|
|
128 [tile 4] [tile 5]
|
|
| v
|
|
| ^
|
|
v 96 [tile 6] [tile 7]
|
|
32 offscreen
|
|
|
|
Tiles have the advantage that they can be allocated individually in
|
|
memory. However, this mapping is not linear at all, which is not
|
|
really convienient. In order to support linear addressing, the GBE
|
|
DMA hardware is fooled into thinking the screen is only one tile
|
|
large and but has a greater height, so that the DMA transfer covers
|
|
the same region.
|
|
Tiles are still allocated as independent chunks of 64KB of
|
|
continuous physical memory and remapped so that the kernel sees the
|
|
framebuffer as a continuous virtual memory. The GBE tile table is
|
|
set up so that each tile references one of these 64k blocks:
|
|
|
|
GBE -> tile list framebuffer TLB <------------ CPU
|
|
[ tile 0 ] -> [ 64KB ] <- [ 16x 4KB page entries ] ^
|
|
... ... ... linear virtual FB
|
|
[ tile n ] -> [ 64KB ] <- [ 16x 4KB page entries ] v
|
|
|
|
|
|
The GBE hardware is then told that the buffer is 512*tweaked_height,
|
|
with tweaked_height = real_width*real_height/pixels_per_tile.
|
|
Thus the GBE hardware will scan the first tile, filing the first 64k
|
|
covered region of the screen, and then will proceed to the next
|
|
tile, until the whole screen is covered.
|
|
|
|
Here is what would happen at 640x480 8bit:
|
|
|
|
normal tiling linear
|
|
^ 11111111111111112222 11111111111111111111 ^
|
|
128 11111111111111112222 11111111111111111111 102 lines
|
|
11111111111111112222 11111111111111111111 v
|
|
V 11111111111111112222 11111111222222222222
|
|
33333333333333334444 22222222222222222222
|
|
33333333333333334444 22222222222222222222
|
|
< 512 > < 256 > 102*640+256 = 64k
|
|
|
|
NOTE: The only mode for which this is not working is 800x600 8bit,
|
|
as 800*600/512 = 937.5 which is not integer and thus causes
|
|
flickering.
|
|
I guess this is not so important as one can use 640x480 8bit or
|
|
800x600 16bit anyway.
|
|
*/
|
|
|
|
/* Tell gbe about the tiles table location */
|
|
/* tile_ptr -> [ tile 1 ] -> FB mem */
|
|
/* [ tile 2 ] -> FB mem */
|
|
/* ... */
|
|
val = 0;
|
|
SET_GBE_FIELD(FRM_CONTROL, FRM_TILE_PTR, val, gbe_tiles.dma >> 9);
|
|
SET_GBE_FIELD(FRM_CONTROL, FRM_DMA_ENABLE, val, 0); /* do not start */
|
|
SET_GBE_FIELD(FRM_CONTROL, FRM_LINEAR, val, 0);
|
|
gbe->frm_control = val;
|
|
|
|
maxPixelsPerTileX = 512 / bytesPerPixel;
|
|
wholeTilesX = 1;
|
|
partTilesX = 0;
|
|
|
|
/* Initialize the framebuffer */
|
|
val = 0;
|
|
SET_GBE_FIELD(FRM_SIZE_TILE, FRM_WIDTH_TILE, val, wholeTilesX);
|
|
SET_GBE_FIELD(FRM_SIZE_TILE, FRM_RHS, val, partTilesX);
|
|
|
|
switch (bytesPerPixel) {
|
|
case 1:
|
|
SET_GBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, val,
|
|
GBE_FRM_DEPTH_8);
|
|
break;
|
|
case 2:
|
|
SET_GBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, val,
|
|
GBE_FRM_DEPTH_16);
|
|
break;
|
|
case 4:
|
|
SET_GBE_FIELD(FRM_SIZE_TILE, FRM_DEPTH, val,
|
|
GBE_FRM_DEPTH_32);
|
|
break;
|
|
}
|
|
gbe->frm_size_tile = val;
|
|
|
|
/* compute tweaked height */
|
|
height_pix = xpmax * ypmax / maxPixelsPerTileX;
|
|
|
|
val = 0;
|
|
SET_GBE_FIELD(FRM_SIZE_PIXEL, FB_HEIGHT_PIX, val, height_pix);
|
|
gbe->frm_size_pixel = val;
|
|
|
|
/* turn off DID and overlay DMA */
|
|
gbe->did_control = 0;
|
|
gbe->ovr_width_tile = 0;
|
|
|
|
/* Turn off mouse cursor */
|
|
gbe->crs_ctl = 0;
|
|
|
|
/* Turn on GBE */
|
|
gbe_turn_on();
|
|
|
|
/* Initialize the gamma map */
|
|
udelay(10);
|
|
for (i = 0; i < 256; i++)
|
|
gbe->gmap[i] = (i << 24) | (i << 16) | (i << 8);
|
|
|
|
/* Initialize the color map */
|
|
for (i = 0; i < 256; i++) {
|
|
int j;
|
|
|
|
for (j = 0; j < 1000 && gbe->cm_fifo >= 63; j++)
|
|
udelay(10);
|
|
if (j == 1000)
|
|
printk(KERN_ERR "gbefb: cmap FIFO timeout\n");
|
|
|
|
gbe->cmap[i] = (i << 8) | (i << 16) | (i << 24);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void gbefb_encode_fix(struct fb_fix_screeninfo *fix,
|
|
struct fb_var_screeninfo *var)
|
|
{
|
|
memset(fix, 0, sizeof(struct fb_fix_screeninfo));
|
|
strcpy(fix->id, "SGI GBE");
|
|
fix->smem_start = (unsigned long) gbe_mem;
|
|
fix->smem_len = gbe_mem_size;
|
|
fix->type = FB_TYPE_PACKED_PIXELS;
|
|
fix->type_aux = 0;
|
|
fix->accel = FB_ACCEL_NONE;
|
|
switch (var->bits_per_pixel) {
|
|
case 8:
|
|
fix->visual = FB_VISUAL_PSEUDOCOLOR;
|
|
break;
|
|
default:
|
|
fix->visual = FB_VISUAL_TRUECOLOR;
|
|
break;
|
|
}
|
|
fix->ywrapstep = 0;
|
|
fix->xpanstep = 0;
|
|
fix->ypanstep = 0;
|
|
fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
|
|
fix->mmio_start = GBE_BASE;
|
|
fix->mmio_len = sizeof(struct sgi_gbe);
|
|
}
|
|
|
|
/*
|
|
* Set a single color register. The values supplied are already
|
|
* rounded down to the hardware's capabilities (according to the
|
|
* entries in the var structure). Return != 0 for invalid regno.
|
|
*/
|
|
|
|
static int gbefb_setcolreg(unsigned regno, unsigned red, unsigned green,
|
|
unsigned blue, unsigned transp,
|
|
struct fb_info *info)
|
|
{
|
|
int i;
|
|
|
|
if (regno > 255)
|
|
return 1;
|
|
red >>= 8;
|
|
green >>= 8;
|
|
blue >>= 8;
|
|
|
|
switch (info->var.bits_per_pixel) {
|
|
case 8:
|
|
/* wait for the color map FIFO to have a free entry */
|
|
for (i = 0; i < 1000 && gbe->cm_fifo >= 63; i++)
|
|
udelay(10);
|
|
if (i == 1000) {
|
|
printk(KERN_ERR "gbefb: cmap FIFO timeout\n");
|
|
return 1;
|
|
}
|
|
gbe->cmap[regno] = (red << 24) | (green << 16) | (blue << 8);
|
|
break;
|
|
case 15:
|
|
case 16:
|
|
red >>= 3;
|
|
green >>= 3;
|
|
blue >>= 3;
|
|
pseudo_palette[regno] =
|
|
(red << info->var.red.offset) |
|
|
(green << info->var.green.offset) |
|
|
(blue << info->var.blue.offset);
|
|
break;
|
|
case 32:
|
|
pseudo_palette[regno] =
|
|
(red << info->var.red.offset) |
|
|
(green << info->var.green.offset) |
|
|
(blue << info->var.blue.offset);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Check video mode validity, eventually modify var to best match.
|
|
*/
|
|
static int gbefb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
|
|
{
|
|
unsigned int line_length;
|
|
struct gbe_timing_info timing;
|
|
|
|
/* Limit bpp to 8, 16, and 32 */
|
|
if (var->bits_per_pixel <= 8)
|
|
var->bits_per_pixel = 8;
|
|
else if (var->bits_per_pixel <= 16)
|
|
var->bits_per_pixel = 16;
|
|
else if (var->bits_per_pixel <= 32)
|
|
var->bits_per_pixel = 32;
|
|
else
|
|
return -EINVAL;
|
|
|
|
/* Check the mode can be mapped linearly with the tile table trick. */
|
|
/* This requires width x height x bytes/pixel be a multiple of 512 */
|
|
if ((var->xres * var->yres * var->bits_per_pixel) & 4095)
|
|
return -EINVAL;
|
|
|
|
var->grayscale = 0; /* No grayscale for now */
|
|
|
|
if ((var->pixclock = compute_gbe_timing(var, &timing)) < 0)
|
|
return(-EINVAL);
|
|
|
|
/* Adjust virtual resolution, if necessary */
|
|
if (var->xres > var->xres_virtual || (!ywrap && !ypan))
|
|
var->xres_virtual = var->xres;
|
|
if (var->yres > var->yres_virtual || (!ywrap && !ypan))
|
|
var->yres_virtual = var->yres;
|
|
|
|
if (var->vmode & FB_VMODE_CONUPDATE) {
|
|
var->vmode |= FB_VMODE_YWRAP;
|
|
var->xoffset = info->var.xoffset;
|
|
var->yoffset = info->var.yoffset;
|
|
}
|
|
|
|
/* No grayscale for now */
|
|
var->grayscale = 0;
|
|
|
|
/* Memory limit */
|
|
line_length = var->xres_virtual * var->bits_per_pixel / 8;
|
|
if (line_length * var->yres_virtual > gbe_mem_size)
|
|
return -ENOMEM; /* Virtual resolution too high */
|
|
|
|
switch (var->bits_per_pixel) {
|
|
case 8:
|
|
var->red.offset = 0;
|
|
var->red.length = 8;
|
|
var->green.offset = 0;
|
|
var->green.length = 8;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
case 16: /* RGB 1555 */
|
|
var->red.offset = 10;
|
|
var->red.length = 5;
|
|
var->green.offset = 5;
|
|
var->green.length = 5;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 5;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
break;
|
|
case 32: /* RGB 8888 */
|
|
var->red.offset = 24;
|
|
var->red.length = 8;
|
|
var->green.offset = 16;
|
|
var->green.length = 8;
|
|
var->blue.offset = 8;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 0;
|
|
var->transp.length = 8;
|
|
break;
|
|
}
|
|
var->red.msb_right = 0;
|
|
var->green.msb_right = 0;
|
|
var->blue.msb_right = 0;
|
|
var->transp.msb_right = 0;
|
|
|
|
var->left_margin = timing.htotal - timing.hsync_end;
|
|
var->right_margin = timing.hsync_start - timing.width;
|
|
var->upper_margin = timing.vtotal - timing.vsync_end;
|
|
var->lower_margin = timing.vsync_start - timing.height;
|
|
var->hsync_len = timing.hsync_end - timing.hsync_start;
|
|
var->vsync_len = timing.vsync_end - timing.vsync_start;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int gbefb_mmap(struct fb_info *info, struct file *file,
|
|
struct vm_area_struct *vma)
|
|
{
|
|
unsigned long size = vma->vm_end - vma->vm_start;
|
|
unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
|
|
unsigned long addr;
|
|
unsigned long phys_addr, phys_size;
|
|
u16 *tile;
|
|
|
|
/* check range */
|
|
if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
|
|
return -EINVAL;
|
|
if (offset + size > gbe_mem_size)
|
|
return -EINVAL;
|
|
|
|
/* remap using the fastest write-through mode on architecture */
|
|
/* try not polluting the cache when possible */
|
|
pgprot_val(vma->vm_page_prot) =
|
|
pgprot_fb(pgprot_val(vma->vm_page_prot));
|
|
|
|
vma->vm_flags |= VM_IO | VM_RESERVED;
|
|
vma->vm_file = file;
|
|
|
|
/* look for the starting tile */
|
|
tile = &gbe_tiles.cpu[offset >> TILE_SHIFT];
|
|
addr = vma->vm_start;
|
|
offset &= TILE_MASK;
|
|
|
|
/* remap each tile separately */
|
|
do {
|
|
phys_addr = (((unsigned long) (*tile)) << TILE_SHIFT) + offset;
|
|
if ((offset + size) < TILE_SIZE)
|
|
phys_size = size;
|
|
else
|
|
phys_size = TILE_SIZE - offset;
|
|
|
|
if (remap_pfn_range(vma, addr, phys_addr >> PAGE_SHIFT,
|
|
phys_size, vma->vm_page_prot))
|
|
return -EAGAIN;
|
|
|
|
offset = 0;
|
|
size -= phys_size;
|
|
addr += phys_size;
|
|
tile++;
|
|
} while (size);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct fb_ops gbefb_ops = {
|
|
.owner = THIS_MODULE,
|
|
.fb_check_var = gbefb_check_var,
|
|
.fb_set_par = gbefb_set_par,
|
|
.fb_setcolreg = gbefb_setcolreg,
|
|
.fb_mmap = gbefb_mmap,
|
|
.fb_blank = gbefb_blank,
|
|
.fb_fillrect = cfb_fillrect,
|
|
.fb_copyarea = cfb_copyarea,
|
|
.fb_imageblit = cfb_imageblit,
|
|
.fb_cursor = soft_cursor,
|
|
};
|
|
|
|
/*
|
|
* sysfs
|
|
*/
|
|
|
|
static ssize_t gbefb_show_memsize(struct device *dev, struct device_attribute *attr, char *buf)
|
|
{
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", gbe_mem_size);
|
|
}
|
|
|
|
static DEVICE_ATTR(size, S_IRUGO, gbefb_show_memsize, NULL);
|
|
|
|
static ssize_t gbefb_show_rev(struct device *device, struct device_attribute *attr, char *buf)
|
|
{
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", gbe_revision);
|
|
}
|
|
|
|
static DEVICE_ATTR(revision, S_IRUGO, gbefb_show_rev, NULL);
|
|
|
|
static void __devexit gbefb_remove_sysfs(struct device *dev)
|
|
{
|
|
device_remove_file(dev, &dev_attr_size);
|
|
device_remove_file(dev, &dev_attr_revision);
|
|
}
|
|
|
|
static void gbefb_create_sysfs(struct device *dev)
|
|
{
|
|
device_create_file(dev, &dev_attr_size);
|
|
device_create_file(dev, &dev_attr_revision);
|
|
}
|
|
|
|
/*
|
|
* Initialization
|
|
*/
|
|
|
|
int __init gbefb_setup(char *options)
|
|
{
|
|
char *this_opt;
|
|
|
|
if (!options || !*options)
|
|
return 0;
|
|
|
|
while ((this_opt = strsep(&options, ",")) != NULL) {
|
|
if (!strncmp(this_opt, "monitor:", 8)) {
|
|
if (!strncmp(this_opt + 8, "crt", 3)) {
|
|
flat_panel_enabled = 0;
|
|
default_var = &default_var_CRT;
|
|
default_mode = &default_mode_CRT;
|
|
} else if (!strncmp(this_opt + 8, "1600sw", 6) ||
|
|
!strncmp(this_opt + 8, "lcd", 3)) {
|
|
flat_panel_enabled = 1;
|
|
default_var = &default_var_LCD;
|
|
default_mode = &default_mode_LCD;
|
|
}
|
|
} else if (!strncmp(this_opt, "mem:", 4)) {
|
|
gbe_mem_size = memparse(this_opt + 4, &this_opt);
|
|
if (gbe_mem_size > CONFIG_FB_GBE_MEM * 1024 * 1024)
|
|
gbe_mem_size = CONFIG_FB_GBE_MEM * 1024 * 1024;
|
|
if (gbe_mem_size < TILE_SIZE)
|
|
gbe_mem_size = TILE_SIZE;
|
|
} else
|
|
mode_option = this_opt;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int __init gbefb_probe(struct device *dev)
|
|
{
|
|
int i, ret = 0;
|
|
struct fb_info *info;
|
|
struct gbefb_par *par;
|
|
struct platform_device *p_dev = to_platform_device(dev);
|
|
#ifndef MODULE
|
|
char *options = NULL;
|
|
#endif
|
|
|
|
info = framebuffer_alloc(sizeof(struct gbefb_par), &p_dev->dev);
|
|
if (!info)
|
|
return -ENOMEM;
|
|
|
|
#ifndef MODULE
|
|
if (fb_get_options("gbefb", &options))
|
|
return -ENODEV;
|
|
gbefb_setup(options);
|
|
#endif
|
|
|
|
if (!request_mem_region(GBE_BASE, sizeof(struct sgi_gbe), "GBE")) {
|
|
printk(KERN_ERR "gbefb: couldn't reserve mmio region\n");
|
|
ret = -EBUSY;
|
|
goto out_release_framebuffer;
|
|
}
|
|
|
|
gbe = (struct sgi_gbe *) ioremap(GBE_BASE, sizeof(struct sgi_gbe));
|
|
if (!gbe) {
|
|
printk(KERN_ERR "gbefb: couldn't map mmio region\n");
|
|
ret = -ENXIO;
|
|
goto out_release_mem_region;
|
|
}
|
|
gbe_revision = gbe->ctrlstat & 15;
|
|
|
|
gbe_tiles.cpu =
|
|
dma_alloc_coherent(NULL, GBE_TLB_SIZE * sizeof(uint16_t),
|
|
&gbe_tiles.dma, GFP_KERNEL);
|
|
if (!gbe_tiles.cpu) {
|
|
printk(KERN_ERR "gbefb: couldn't allocate tiles table\n");
|
|
ret = -ENOMEM;
|
|
goto out_unmap;
|
|
}
|
|
|
|
if (gbe_mem_phys) {
|
|
/* memory was allocated at boot time */
|
|
gbe_mem = ioremap_nocache(gbe_mem_phys, gbe_mem_size);
|
|
gbe_dma_addr = 0;
|
|
} else {
|
|
/* try to allocate memory with the classical allocator
|
|
* this has high chance to fail on low memory machines */
|
|
gbe_mem = dma_alloc_coherent(NULL, gbe_mem_size, &gbe_dma_addr,
|
|
GFP_KERNEL);
|
|
gbe_mem_phys = (unsigned long) gbe_dma_addr;
|
|
}
|
|
|
|
#ifdef CONFIG_X86
|
|
mtrr_add(gbe_mem_phys, gbe_mem_size, MTRR_TYPE_WRCOMB, 1);
|
|
#endif
|
|
|
|
if (!gbe_mem) {
|
|
printk(KERN_ERR "gbefb: couldn't map framebuffer\n");
|
|
ret = -ENXIO;
|
|
goto out_tiles_free;
|
|
}
|
|
|
|
/* map framebuffer memory into tiles table */
|
|
for (i = 0; i < (gbe_mem_size >> TILE_SHIFT); i++)
|
|
gbe_tiles.cpu[i] = (gbe_mem_phys >> TILE_SHIFT) + i;
|
|
|
|
info->fbops = &gbefb_ops;
|
|
info->pseudo_palette = pseudo_palette;
|
|
info->flags = FBINFO_DEFAULT;
|
|
info->screen_base = gbe_mem;
|
|
fb_alloc_cmap(&info->cmap, 256, 0);
|
|
|
|
/* reset GBE */
|
|
gbe_reset();
|
|
|
|
par = info->par;
|
|
/* turn on default video mode */
|
|
if (fb_find_mode(&par->var, info, mode_option, NULL, 0,
|
|
default_mode, 8) == 0)
|
|
par->var = *default_var;
|
|
info->var = par->var;
|
|
gbefb_check_var(&par->var, info);
|
|
gbefb_encode_fix(&info->fix, &info->var);
|
|
|
|
if (register_framebuffer(info) < 0) {
|
|
printk(KERN_ERR "gbefb: couldn't register framebuffer\n");
|
|
ret = -ENXIO;
|
|
goto out_gbe_unmap;
|
|
}
|
|
|
|
dev_set_drvdata(&p_dev->dev, info);
|
|
gbefb_create_sysfs(dev);
|
|
|
|
printk(KERN_INFO "fb%d: %s rev %d @ 0x%08x using %dkB memory\n",
|
|
info->node, info->fix.id, gbe_revision, (unsigned) GBE_BASE,
|
|
gbe_mem_size >> 10);
|
|
|
|
return 0;
|
|
|
|
out_gbe_unmap:
|
|
if (gbe_dma_addr)
|
|
dma_free_coherent(NULL, gbe_mem_size, gbe_mem, gbe_mem_phys);
|
|
else
|
|
iounmap(gbe_mem);
|
|
out_tiles_free:
|
|
dma_free_coherent(NULL, GBE_TLB_SIZE * sizeof(uint16_t),
|
|
(void *)gbe_tiles.cpu, gbe_tiles.dma);
|
|
out_unmap:
|
|
iounmap(gbe);
|
|
out_release_mem_region:
|
|
release_mem_region(GBE_BASE, sizeof(struct sgi_gbe));
|
|
out_release_framebuffer:
|
|
framebuffer_release(info);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit gbefb_remove(struct device* dev)
|
|
{
|
|
struct platform_device *p_dev = to_platform_device(dev);
|
|
struct fb_info *info = dev_get_drvdata(&p_dev->dev);
|
|
|
|
unregister_framebuffer(info);
|
|
gbe_turn_off();
|
|
if (gbe_dma_addr)
|
|
dma_free_coherent(NULL, gbe_mem_size, gbe_mem, gbe_mem_phys);
|
|
else
|
|
iounmap(gbe_mem);
|
|
dma_free_coherent(NULL, GBE_TLB_SIZE * sizeof(uint16_t),
|
|
(void *)gbe_tiles.cpu, gbe_tiles.dma);
|
|
release_mem_region(GBE_BASE, sizeof(struct sgi_gbe));
|
|
iounmap(gbe);
|
|
gbefb_remove_sysfs(dev);
|
|
framebuffer_release(info);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct device_driver gbefb_driver = {
|
|
.name = "gbefb",
|
|
.bus = &platform_bus_type,
|
|
.probe = gbefb_probe,
|
|
.remove = __devexit_p(gbefb_remove),
|
|
};
|
|
|
|
static struct platform_device gbefb_device = {
|
|
.name = "gbefb",
|
|
};
|
|
|
|
int __init gbefb_init(void)
|
|
{
|
|
int ret = driver_register(&gbefb_driver);
|
|
if (!ret) {
|
|
ret = platform_device_register(&gbefb_device);
|
|
if (ret)
|
|
driver_unregister(&gbefb_driver);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
void __exit gbefb_exit(void)
|
|
{
|
|
driver_unregister(&gbefb_driver);
|
|
}
|
|
|
|
module_init(gbefb_init);
|
|
module_exit(gbefb_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|