linux-stable/drivers/phy
Rafał Miłecki 675216a820 phy: phy-brcm-usb: fixup BCM4908 support
[ Upstream commit 32942d33d6 ]

Just like every other family BCM4908 should get its own enum value. That
is required to properly handle it in chipset conditional code.

The real change is excluding BCM4908 from the PLL reprogramming code
(see brcmusb_usb3_pll_54mhz()). I'm not sure what's the BCM4908
reference clock frequency but:
1. BCM4908 custom driver from Broadcom's SDK doesn't reprogram PLL
2. Doing that in Linux driver stopped PHY handling some USB 3.0 devices

This change makes USB 3.0 PHY recognize e.g.:
1. 04e8:6860 - Samsung Electronics Co., Ltd Galaxy series, misc. (MTP mode)
2. 1058:259f - Western Digital My Passport 259F

Broadcom's STB SoCs come with a set of SUN_TOP_CTRL_* registers that
allow reading chip family and product ids. Such a block & register is
missing on BCM4908 so this commit introduces "compatible" string
specific binding.

Fixes: 4b402fa8e0 ("phy: phy-brcm-usb: support PHY on the BCM4908")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220218172459.10431-1-zajec5@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-04-08 14:23:46 +02:00
..
allwinner
amlogic phy: dphy: Correct clk_pre parameter 2022-02-16 12:56:23 +01:00
broadcom phy: phy-brcm-usb: fixup BCM4908 support 2022-04-08 14:23:46 +02:00
cadence phy: cadence: Sierra: Fix to get correct parent for mux clocks 2022-01-27 11:04:16 +01:00
freescale
hisilicon phy: phy-hi3670-usb3: move driver from staging into phy 2021-06-25 10:02:02 +02:00
ingenic
intel phy: intel: Fix for warnings due to EMMC clock 175Mhz change in FIP 2021-06-29 16:45:16 +02:00
lantiq
marvell phy: marvell: phy-mvebu-a3700-comphy: Remove unsupported modes 2021-08-27 12:20:33 +01:00
mediatek phy: phy-mtk-tphy: Fix duplicated argument in phy-mtk-tphy 2022-02-23 12:03:17 +01:00
microchip phy: Sparx5 Eth SerDes: Fix return value check in sparx5_serdes_probe() 2021-11-18 19:16:56 +01:00
motorola
mscc
qualcomm phy: qcom-snps: Correct the FSEL_MASK 2021-11-18 19:16:56 +01:00
ralink phy-for-5.14 version 2 2021-06-23 10:33:34 +02:00
renesas phy: renesas: phy-rcar-gen3-usb2: Add USB2.0 PHY support for RZ/G2L 2021-08-06 18:12:30 +05:30
rockchip phy: dphy: Correct clk_pre parameter 2022-02-16 12:56:23 +01:00
samsung phy: samsung-ufs: support exynosauto ufs phy driver 2021-07-20 16:43:10 +05:30
socionext phy: uniphier-usb3ss: fix unintended writing zeros to PHY register 2022-01-27 11:04:16 +01:00
st phy: stm32: fix a refcount leak in stm32_usbphyc_pll_enable() 2022-02-16 12:56:22 +01:00
tegra phy: tegra: xusb: mark PM functions as __maybe_unused 2021-07-22 14:41:07 +05:30
ti phy: ti: Fix missing sentinel for clk_div_table 2022-02-16 12:56:37 +01:00
xilinx phy: xilinx: zynqmp: Fix bus width setting for SGMII 2022-02-16 12:56:22 +01:00
Kconfig phy: pistachio-usb: Depend on MIPS || COMPILE_TEST 2021-08-12 16:01:49 +02:00
Makefile phy: phy-can-transceiver: Add support for generic CAN transceiver driver 2021-06-14 11:20:17 +05:30
phy-can-transceiver.c phy: phy-can-transceiver: Add support for generic CAN transceiver driver 2021-06-14 11:20:17 +05:30
phy-core-mipi-dphy.c phy: dphy: Correct lpx parameter and its derivatives(ta_{get,go,sure}) 2022-04-08 14:23:46 +02:00
phy-core.c
phy-lgm-usb.c
phy-lpc18xx-usb-otg.c
phy-pistachio-usb.c
phy-xgene.c