linux-stable/drivers/gpu
Imre Deak 9c3a16c887 drm/i915/hsw+: Add support for multiple power well regs
Future platforms increase the number of power wells which require
additional control registers. A convenient way to select the correct
register is to use the high bits of the power well ID as index. This
patch only prepares for this, while upcoming platform enabling patches
will add the actual new power well IDs and corresponding power well
control registers.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Rakshmi Bhatia <rakshmi.bhatia@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Rakshmi Bhatia <rakshmi.bhatia@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170814151530.24154-2-imre.deak@intel.com
2017-08-15 15:28:10 +03:00
..
drm drm/i915/hsw+: Add support for multiple power well regs 2017-08-15 15:28:10 +03:00
host1x gpu/host1x: Remove excess parameter in host1x_subdev_add docs 2017-07-31 14:24:37 +02:00
ipu-v3 drm: Convert to using %pOF instead of full_name 2017-07-26 13:45:06 +02:00
vga sched/wait: Rename wait_queue_t => wait_queue_entry_t 2017-06-20 12:18:27 +02:00
Makefile