mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 19:00:25 +00:00
455e73a07f
they're mostly minor cleanups and some debugfs stuff. The real work
that's in here is the typical pile of clk driver updates and new SoC
support. Per usual (or maybe just recent trends), Qualcomm gains a
handful of SoC drivers additions and has the largest diffstat. After
that there are quite a few updates to the Allwinner (sunxi) drivers to
support modular drivers and Renesas is heavily updated to add more
support for various clks. Overall it looks pretty normal.
New Drivers:
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
- Clock and reset driver for Toshiba Visconti SoCs
- Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
- Allwinner D1 clks
- Lan966x Generic Clock Controller driver and associated DT bindings
- Qualcomm SDX65, SM8450, and MSM8976 GCC clks
- Qualcomm SDX65 and SM8450 RPMh clks
Updates:
- Set suppress_bind_attrs to true for i.MX8ULP driver
- Switch from do_div to div64_ul for throughout all i.MX drivers
- Fix imx8mn_clko1_sels for i.MX8MN
- Remove unused IPG_AUDIO_ROOT from i.MX8MP
- Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
- Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung
- Refactoring of the CPU clocks registration to use common interface
- An update of the Exynos850 driver (support for more clock domains)
required by the E850-96 development board
- Prep for runtime PM and generic power domains on Tegra
- Support modular Allwinner clk drivers via platform bus
- Lan966x clock driver extended to support clock gating
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on Renesas RZ/G2L
- Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock
drivers, and in the Renesas SDHI driver
- Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
- Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add GPU clock and resets on Renesas RZ/G2L
- Add clk-provider.h to various Qualcomm clk drivers
- devm version of clk_hw_register_gate()
- kerneldoc fixes in a couple drivers
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"We have a couple patches in the framework core this time around but
they're mostly minor cleanups and some debugfs stuff. The real work
that's in here is the typical pile of clk driver updates and new SoC
support.
Per usual (or maybe just recent trends), Qualcomm gains a handful of
SoC drivers additions and has the largest diffstat. After that there
are quite a few updates to the Allwinner (sunxi) drivers to support
modular drivers and Renesas is heavily updated to add more support for
various clks.
Overall it looks pretty normal.
New Drivers:
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770
- MediaTek mt7986 SoC basic support
- Clock and reset driver for Toshiba Visconti SoCs
- Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8)
- Allwinner D1 clks
- Lan966x Generic Clock Controller driver and associated DT bindings
- Qualcomm SDX65, SM8450, and MSM8976 GCC clks
- Qualcomm SDX65 and SM8450 RPMh clks
Updates:
- Set suppress_bind_attrs to true for i.MX8ULP driver
- Switch from do_div to div64_ul for throughout all i.MX drivers
- Fix imx8mn_clko1_sels for i.MX8MN
- Remove unused IPG_AUDIO_ROOT from i.MX8MP
- Switch parent for audio_root_clk to audio ahb in i.MX8MP driver
- Removal of all remaining uses of __clk_lookup() in
drivers/clk/samsung
- Refactoring of the CPU clocks registration to use common interface
- An update of the Exynos850 driver (support for more clock domains)
required by the E850-96 development board
- Prep for runtime PM and generic power domains on Tegra
- Support modular Allwinner clk drivers via platform bus
- Lan966x clock driver extended to support clock gating
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on Renesas RZ/G2L
- Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2
clock drivers, and in the Renesas SDHI driver
- Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable
- Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC
- Add GPU clock and resets on Renesas RZ/G2L
- Add clk-provider.h to various Qualcomm clk drivers
- devm version of clk_hw_register_gate()
- kerneldoc fixes in a couple drivers"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits)
clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup()
clk: mediatek: add mt7986 clock support
clk: mediatek: add mt7986 clock IDs
dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
clk: x86: Fix clk_gate_flags for RV_CLK_GATE
clk: x86: Use dynamic con_id string during clk registration
ACPI: APD: Add a fmw property clk-name
drivers: acpi: acpi_apd: Remove unused device property "is-rv"
x86: clk: clk-fch: Add support for newer family of AMD's SOC
clk: ingenic: Add MDMA and BDMA clocks
dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
clk: bm1880: remove kfrees on static allocations
clk: Drop unused COMMON_CLK_STM32MP157_SCMI config
clk: st: clkgen-mux: search reg within node or parent
clk: st: clkgen-fsyn: search reg within node or parent
clk: Enable/Disable runtime PM for clk_summary
MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller
clk: visconti: Add support common clock driver and reset driver
...
431 lines
13 KiB
Text
431 lines
13 KiB
Text
# SPDX-License-Identifier: GPL-2.0
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config HAVE_CLK
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bool
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help
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The <linux/clk.h> calls support software clock gating and
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thus are a key power management tool on many systems.
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config HAVE_CLK_PREPARE
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bool
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config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
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bool
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select HAVE_CLK
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help
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Select this option when the clock API in <linux/clk.h> is implemented
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by platform/architecture code. This method is deprecated. Modern
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code should select COMMON_CLK instead and not define a custom
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'struct clk'.
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menuconfig COMMON_CLK
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bool "Common Clock Framework"
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depends on !HAVE_LEGACY_CLK
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select HAVE_CLK_PREPARE
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select HAVE_CLK
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select SRCU
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select RATIONAL
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help
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The common clock framework is a single definition of struct
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clk, useful across many platforms, as well as an
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implementation of the clock API in include/linux/clk.h.
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Architectures utilizing the common struct clk should select
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this option.
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if COMMON_CLK
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config COMMON_CLK_WM831X
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tristate "Clock driver for WM831x/2x PMICs"
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depends on MFD_WM831X
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help
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Supports the clocking subsystem of the WM831x/2x series of
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PMICs from Wolfson Microelectronics.
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source "drivers/clk/versatile/Kconfig"
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config CLK_HSDK
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bool "PLL Driver for HSDK platform"
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depends on ARC_SOC_HSDK || COMPILE_TEST
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depends on HAS_IOMEM
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help
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This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
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control.
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config LMK04832
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tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
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depends on SPI
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select REGMAP_SPI
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help
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Say yes here to build support for Texas Instruments' LMK04832 Ultra
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Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
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config COMMON_CLK_MAX77686
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tristate "Clock driver for Maxim 77620/77686/77802 MFD"
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depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
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help
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This driver supports Maxim 77620/77686/77802 crystal oscillator
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clock.
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config COMMON_CLK_MAX9485
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tristate "Maxim 9485 Programmable Clock Generator"
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depends on I2C
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help
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This driver supports Maxim 9485 Programmable Audio Clock Generator
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config COMMON_CLK_RK808
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tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
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depends on MFD_RK808
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help
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This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
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These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
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Clkout1 is always on, Clkout2 can off by control register.
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config COMMON_CLK_HI655X
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tristate "Clock driver for Hi655x" if EXPERT
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depends on (MFD_HI655X_PMIC || COMPILE_TEST)
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depends on REGMAP
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default MFD_HI655X_PMIC
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help
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This driver supports the hi655x PMIC clock. This
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multi-function device has one fixed-rate oscillator, clocked
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at 32KHz.
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config COMMON_CLK_SCMI
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tristate "Clock driver controlled via SCMI interface"
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depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
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help
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This driver provides support for clocks that are controlled
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by firmware that implements the SCMI interface.
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This driver uses SCMI Message Protocol to interact with the
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firmware providing all the clock controls.
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config COMMON_CLK_SCPI
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tristate "Clock driver controlled via SCPI interface"
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depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
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help
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This driver provides support for clocks that are controlled
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by firmware that implements the SCPI interface.
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This driver uses SCPI Message Protocol to interact with the
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firmware providing all the clock controls.
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config COMMON_CLK_SI5341
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tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
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depends on I2C
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select REGMAP_I2C
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help
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This driver supports Silicon Labs Si5341 and Si5340 programmable clock
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generators. Not all features of these chips are currently supported
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by the driver, in particular it only supports XTAL input. The chip can
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be pre-programmed to support other configurations and features not yet
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implemented in the driver.
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config COMMON_CLK_SI5351
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tristate "Clock driver for SiLabs 5351A/B/C"
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depends on I2C
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select REGMAP_I2C
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help
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This driver supports Silicon Labs 5351A/B/C programmable clock
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generators.
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config COMMON_CLK_SI514
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tristate "Clock driver for SiLabs 514 devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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This driver supports the Silicon Labs 514 programmable clock
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generator.
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config COMMON_CLK_SI544
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tristate "Clock driver for SiLabs 544 devices"
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depends on I2C
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select REGMAP_I2C
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help
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This driver supports the Silicon Labs 544 programmable clock
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generator.
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config COMMON_CLK_SI570
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tristate "Clock driver for SiLabs 570 and compatible devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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This driver supports Silicon Labs 570/571/598/599 programmable
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clock generators.
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config COMMON_CLK_BM1880
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bool "Clock driver for Bitmain BM1880 SoC"
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depends on ARCH_BITMAIN || COMPILE_TEST
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default ARCH_BITMAIN
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help
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This driver supports the clocks on Bitmain BM1880 SoC.
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config COMMON_CLK_CDCE706
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tristate "Clock driver for TI CDCE706 clock synthesizer"
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depends on I2C
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select REGMAP_I2C
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help
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This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
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config COMMON_CLK_TPS68470
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tristate "Clock Driver for TI TPS68470 PMIC"
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depends on I2C
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depends on INTEL_SKL_INT3472 || COMPILE_TEST
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select REGMAP_I2C
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help
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This driver supports the clocks provided by the TPS68470 PMIC.
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config COMMON_CLK_CDCE925
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tristate "Clock driver for TI CDCE913/925/937/949 devices"
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depends on I2C
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depends on OF
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select REGMAP_I2C
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help
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This driver supports the TI CDCE913/925/937/949 programmable clock
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synthesizer. Each chip has different number of PLLs and outputs.
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For example, the CDCE925 contains two PLLs with spread-spectrum
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clocking support and five output dividers. The driver only supports
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the following setup, and uses a fixed setting for the output muxes.
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Y1 is derived from the input clock
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Y2 and Y3 derive from PLL1
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Y4 and Y5 derive from PLL2
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Given a target output frequency, the driver will set the PLL and
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divider to best approximate the desired output.
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config COMMON_CLK_CS2000_CP
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tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
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depends on I2C
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help
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If you say yes here you get support for the CS2000 clock multiplier.
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config COMMON_CLK_FSL_FLEXSPI
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tristate "Clock driver for FlexSPI on Layerscape SoCs"
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depends on ARCH_LAYERSCAPE || COMPILE_TEST
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default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
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help
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On Layerscape SoCs there is a special clock for the FlexSPI
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interface.
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config COMMON_CLK_FSL_SAI
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bool "Clock driver for BCLK of Freescale SAI cores"
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depends on ARCH_LAYERSCAPE || COMPILE_TEST
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help
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This driver supports the Freescale SAI (Synchronous Audio Interface)
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to be used as a generic clock output. Some SoCs have restrictions
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regarding the possible pin multiplexer settings. Eg. on some SoCs
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two SAI interfaces can only be enabled together. If just one is
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needed, the BCLK pin of the second one can be used as general
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purpose clock output. Ideally, it can be used to drive an audio
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codec (sometimes known as MCLK).
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config COMMON_CLK_GEMINI
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bool "Clock driver for Cortina Systems Gemini SoC"
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depends on ARCH_GEMINI || COMPILE_TEST
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select MFD_SYSCON
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select RESET_CONTROLLER
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help
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This driver supports the SoC clocks on the Cortina Systems Gemini
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platform, also known as SL3516 or CS3516.
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config COMMON_CLK_LAN966X
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bool "Generic Clock Controller driver for LAN966X SoC"
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help
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This driver provides support for Generic Clock Controller(GCK) on
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LAN966X SoC. GCK generates and supplies clock to various peripherals
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within the SoC.
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config COMMON_CLK_ASPEED
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bool "Clock driver for Aspeed BMC SoCs"
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depends on ARCH_ASPEED || COMPILE_TEST
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default ARCH_ASPEED
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select MFD_SYSCON
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select RESET_CONTROLLER
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help
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This driver supports the SoC clocks on the Aspeed BMC platforms.
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The G4 and G5 series, including the ast2400 and ast2500, are supported
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by this driver.
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config COMMON_CLK_S2MPS11
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tristate "Clock driver for S2MPS1X/S5M8767 MFD"
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depends on MFD_SEC_CORE || COMPILE_TEST
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help
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This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
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clock. These multi-function devices have two (S2MPS14) or three
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(S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
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config CLK_TWL6040
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tristate "External McPDM functional clock from twl6040"
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depends on TWL6040_CORE
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help
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Enable the external functional clock support on OMAP4+ platforms for
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McPDM. McPDM module is using the external bit clock on the McPDM bus
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as functional clock.
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config COMMON_CLK_AXI_CLKGEN
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tristate "AXI clkgen driver"
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depends on HAS_IOMEM || COMPILE_TEST
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depends on OF
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help
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Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
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FPGAs. It is commonly used in Analog Devices' reference designs.
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config CLK_QORIQ
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bool "Clock driver for Freescale QorIQ platforms"
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depends on OF
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depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
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help
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This adds the clock driver support for Freescale QorIQ platforms
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using common clock framework.
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config CLK_LS1028A_PLLDIG
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tristate "Clock driver for LS1028A Display output"
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depends on ARCH_LAYERSCAPE || COMPILE_TEST
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default ARCH_LAYERSCAPE
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help
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This driver support the Display output interfaces(LCD, DPHY) pixel clocks
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of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
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features of the PLL are currently supported by the driver. By default,
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configured bypass mode with this PLL.
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config COMMON_CLK_XGENE
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bool "Clock driver for APM XGene SoC"
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default ARCH_XGENE
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depends on ARM64 || COMPILE_TEST
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help
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Support for the APM X-Gene SoC reference, PLL, and device clocks.
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config COMMON_CLK_LOCHNAGAR
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tristate "Cirrus Logic Lochnagar clock driver"
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depends on MFD_LOCHNAGAR
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help
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This driver supports the clocking features of the Cirrus Logic
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Lochnagar audio development board.
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config COMMON_CLK_NXP
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def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
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select REGMAP_MMIO if ARCH_LPC32XX
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select MFD_SYSCON if ARCH_LPC18XX
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help
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Support for clock providers on NXP platforms.
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config COMMON_CLK_PALMAS
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tristate "Clock driver for TI Palmas devices"
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depends on MFD_PALMAS
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help
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This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
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using common clock framework.
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config COMMON_CLK_PWM
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tristate "Clock driver for PWMs used as clock outputs"
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depends on PWM
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help
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Adapter driver so that any PWM output can be (mis)used as clock signal
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at 50% duty cycle.
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config COMMON_CLK_PXA
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def_bool COMMON_CLK && ARCH_PXA
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help
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Support for the Marvell PXA SoC.
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config COMMON_CLK_PIC32
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def_bool COMMON_CLK && MACH_PIC32
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config COMMON_CLK_OXNAS
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bool "Clock driver for the OXNAS SoC Family"
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depends on ARCH_OXNAS || COMPILE_TEST
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select MFD_SYSCON
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help
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Support for the OXNAS SoC Family clocks.
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config COMMON_CLK_VC5
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tristate "Clock driver for IDT VersaClock 5,6 devices"
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depends on I2C
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depends on OF
|
|
select REGMAP_I2C
|
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help
|
|
This driver supports the IDT VersaClock 5 and VersaClock 6
|
|
programmable clock generators.
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|
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config COMMON_CLK_STM32MP157
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def_bool COMMON_CLK && MACH_STM32MP157
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help
|
|
Support for stm32mp157 SoC family clocks
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|
|
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config COMMON_CLK_STM32F
|
|
def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
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|
help
|
|
Support for stm32f4 and stm32f7 SoC families clocks
|
|
|
|
config COMMON_CLK_STM32H7
|
|
def_bool COMMON_CLK && MACH_STM32H743
|
|
help
|
|
Support for stm32h7 SoC family clocks
|
|
|
|
config COMMON_CLK_MMP2
|
|
def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
|
|
help
|
|
Support for Marvell MMP2 and MMP3 SoC clocks
|
|
|
|
config COMMON_CLK_MMP2_AUDIO
|
|
tristate "Clock driver for MMP2 Audio subsystem"
|
|
depends on COMMON_CLK_MMP2 || COMPILE_TEST
|
|
help
|
|
This driver supports clocks for Audio subsystem on MMP2 SoC.
|
|
|
|
config COMMON_CLK_BD718XX
|
|
tristate "Clock driver for 32K clk gates on ROHM PMICs"
|
|
depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
|
|
help
|
|
This driver supports ROHM BD71837, BD71847, BD71850, BD71815
|
|
and BD71828 PMICs clock gates.
|
|
|
|
config COMMON_CLK_FIXED_MMIO
|
|
bool "Clock driver for Memory Mapped Fixed values"
|
|
depends on COMMON_CLK && OF
|
|
help
|
|
Support for Memory Mapped IO Fixed clocks
|
|
|
|
config COMMON_CLK_K210
|
|
bool "Clock driver for the Canaan Kendryte K210 SoC"
|
|
depends on OF && RISCV && SOC_CANAAN
|
|
default SOC_CANAAN
|
|
help
|
|
Support for the Canaan Kendryte K210 RISC-V SoC clocks.
|
|
|
|
source "drivers/clk/actions/Kconfig"
|
|
source "drivers/clk/analogbits/Kconfig"
|
|
source "drivers/clk/baikal-t1/Kconfig"
|
|
source "drivers/clk/bcm/Kconfig"
|
|
source "drivers/clk/hisilicon/Kconfig"
|
|
source "drivers/clk/imgtec/Kconfig"
|
|
source "drivers/clk/imx/Kconfig"
|
|
source "drivers/clk/ingenic/Kconfig"
|
|
source "drivers/clk/keystone/Kconfig"
|
|
source "drivers/clk/mediatek/Kconfig"
|
|
source "drivers/clk/meson/Kconfig"
|
|
source "drivers/clk/mstar/Kconfig"
|
|
source "drivers/clk/mvebu/Kconfig"
|
|
source "drivers/clk/pistachio/Kconfig"
|
|
source "drivers/clk/qcom/Kconfig"
|
|
source "drivers/clk/ralink/Kconfig"
|
|
source "drivers/clk/renesas/Kconfig"
|
|
source "drivers/clk/rockchip/Kconfig"
|
|
source "drivers/clk/samsung/Kconfig"
|
|
source "drivers/clk/sifive/Kconfig"
|
|
source "drivers/clk/socfpga/Kconfig"
|
|
source "drivers/clk/sprd/Kconfig"
|
|
source "drivers/clk/starfive/Kconfig"
|
|
source "drivers/clk/sunxi/Kconfig"
|
|
source "drivers/clk/sunxi-ng/Kconfig"
|
|
source "drivers/clk/tegra/Kconfig"
|
|
source "drivers/clk/ti/Kconfig"
|
|
source "drivers/clk/uniphier/Kconfig"
|
|
source "drivers/clk/visconti/Kconfig"
|
|
source "drivers/clk/x86/Kconfig"
|
|
source "drivers/clk/xilinx/Kconfig"
|
|
source "drivers/clk/zynqmp/Kconfig"
|
|
|
|
endif
|