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![Eddie James](/assets/img/avatar_default.png)
If the SBEFIFO response indicates an error, store the response in the user buffer and return an error. Previously, the user had no way of obtaining the SBEFIFO FFDC. The user's buffer now contains data in the event of a failure. No change in the event of a successful transfer. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20211019205307.36946-3-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
699 lines
16 KiB
C
699 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/fsi-sbefifo.h>
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#include <linux/gfp.h>
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#include <linux/idr.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/miscdevice.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/fsi-occ.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <asm/unaligned.h>
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#define OCC_SRAM_BYTES 4096
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#define OCC_CMD_DATA_BYTES 4090
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#define OCC_RESP_DATA_BYTES 4089
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#define OCC_P9_SRAM_CMD_ADDR 0xFFFBE000
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#define OCC_P9_SRAM_RSP_ADDR 0xFFFBF000
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#define OCC_P10_SRAM_CMD_ADDR 0xFFFFD000
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#define OCC_P10_SRAM_RSP_ADDR 0xFFFFE000
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#define OCC_P10_SRAM_MODE 0x58 /* Normal mode, OCB channel 2 */
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#define OCC_TIMEOUT_MS 1000
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#define OCC_CMD_IN_PRG_WAIT_MS 50
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enum versions { occ_p9, occ_p10 };
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struct occ {
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struct device *dev;
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struct device *sbefifo;
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char name[32];
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int idx;
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u8 sequence_number;
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void *buffer;
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void *client_buffer;
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size_t client_buffer_size;
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size_t client_response_size;
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enum versions version;
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struct miscdevice mdev;
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struct mutex occ_lock;
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};
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#define to_occ(x) container_of((x), struct occ, mdev)
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struct occ_response {
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u8 seq_no;
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u8 cmd_type;
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u8 return_status;
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__be16 data_length;
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u8 data[OCC_RESP_DATA_BYTES + 2]; /* two bytes checksum */
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} __packed;
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struct occ_client {
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struct occ *occ;
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struct mutex lock;
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size_t data_size;
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size_t read_offset;
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u8 *buffer;
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};
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#define to_client(x) container_of((x), struct occ_client, xfr)
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static DEFINE_IDA(occ_ida);
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static int occ_open(struct inode *inode, struct file *file)
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{
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struct occ_client *client = kzalloc(sizeof(*client), GFP_KERNEL);
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struct miscdevice *mdev = file->private_data;
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struct occ *occ = to_occ(mdev);
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if (!client)
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return -ENOMEM;
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client->buffer = (u8 *)__get_free_page(GFP_KERNEL);
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if (!client->buffer) {
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kfree(client);
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return -ENOMEM;
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}
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client->occ = occ;
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mutex_init(&client->lock);
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file->private_data = client;
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/* We allocate a 1-page buffer, make sure it all fits */
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BUILD_BUG_ON((OCC_CMD_DATA_BYTES + 3) > PAGE_SIZE);
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BUILD_BUG_ON((OCC_RESP_DATA_BYTES + 7) > PAGE_SIZE);
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return 0;
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}
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static ssize_t occ_read(struct file *file, char __user *buf, size_t len,
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loff_t *offset)
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{
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struct occ_client *client = file->private_data;
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ssize_t rc = 0;
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if (!client)
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return -ENODEV;
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if (len > OCC_SRAM_BYTES)
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return -EINVAL;
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mutex_lock(&client->lock);
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/* This should not be possible ... */
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if (WARN_ON_ONCE(client->read_offset > client->data_size)) {
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rc = -EIO;
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goto done;
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}
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/* Grab how much data we have to read */
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rc = min(len, client->data_size - client->read_offset);
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if (copy_to_user(buf, client->buffer + client->read_offset, rc))
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rc = -EFAULT;
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else
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client->read_offset += rc;
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done:
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mutex_unlock(&client->lock);
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return rc;
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}
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static ssize_t occ_write(struct file *file, const char __user *buf,
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size_t len, loff_t *offset)
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{
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struct occ_client *client = file->private_data;
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size_t rlen, data_length;
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ssize_t rc;
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u8 *cmd;
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if (!client)
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return -ENODEV;
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if (len > (OCC_CMD_DATA_BYTES + 3) || len < 3)
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return -EINVAL;
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mutex_lock(&client->lock);
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/* Construct the command */
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cmd = client->buffer;
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/*
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* Copy the user command (assume user data follows the occ command
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* format)
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* byte 0: command type
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* bytes 1-2: data length (msb first)
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* bytes 3-n: data
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*/
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if (copy_from_user(&cmd[1], buf, len)) {
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rc = -EFAULT;
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goto done;
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}
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/* Extract data length */
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data_length = (cmd[2] << 8) + cmd[3];
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if (data_length > OCC_CMD_DATA_BYTES) {
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rc = -EINVAL;
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goto done;
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}
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/* Submit command; 4 bytes before the data and 2 bytes after */
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rlen = PAGE_SIZE;
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rc = fsi_occ_submit(client->occ->dev, cmd, data_length + 6, cmd,
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&rlen);
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if (rc)
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goto done;
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/* Set read tracking data */
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client->data_size = rlen;
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client->read_offset = 0;
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/* Done */
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rc = len;
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done:
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mutex_unlock(&client->lock);
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return rc;
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}
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static int occ_release(struct inode *inode, struct file *file)
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{
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struct occ_client *client = file->private_data;
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free_page((unsigned long)client->buffer);
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kfree(client);
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return 0;
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}
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static const struct file_operations occ_fops = {
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.owner = THIS_MODULE,
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.open = occ_open,
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.read = occ_read,
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.write = occ_write,
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.release = occ_release,
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};
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static void occ_save_ffdc(struct occ *occ, __be32 *resp, size_t parsed_len,
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size_t resp_len)
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{
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if (resp_len > parsed_len) {
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size_t dh = resp_len - parsed_len;
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size_t ffdc_len = (dh - 1) * 4; /* SBE words are four bytes */
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__be32 *ffdc = &resp[parsed_len];
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if (ffdc_len > occ->client_buffer_size)
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ffdc_len = occ->client_buffer_size;
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memcpy(occ->client_buffer, ffdc, ffdc_len);
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occ->client_response_size = ffdc_len;
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}
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}
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static int occ_verify_checksum(struct occ *occ, struct occ_response *resp,
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u16 data_length)
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{
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/* Fetch the two bytes after the data for the checksum. */
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u16 checksum_resp = get_unaligned_be16(&resp->data[data_length]);
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u16 checksum;
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u16 i;
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checksum = resp->seq_no;
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checksum += resp->cmd_type;
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checksum += resp->return_status;
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checksum += (data_length >> 8) + (data_length & 0xFF);
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for (i = 0; i < data_length; ++i)
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checksum += resp->data[i];
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if (checksum != checksum_resp) {
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dev_err(occ->dev, "Bad checksum: %04x!=%04x\n", checksum,
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checksum_resp);
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return -EBADMSG;
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}
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return 0;
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}
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static int occ_getsram(struct occ *occ, u32 offset, void *data, ssize_t len)
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{
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u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
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size_t cmd_len, parsed_len, resp_data_len;
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size_t resp_len = OCC_MAX_RESP_WORDS;
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__be32 *resp = occ->buffer;
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__be32 cmd[6];
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int idx = 0, rc;
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/*
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* Magic sequence to do SBE getsram command. SBE will fetch data from
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* specified SRAM address.
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*/
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switch (occ->version) {
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default:
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case occ_p9:
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cmd_len = 5;
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cmd[2] = cpu_to_be32(1); /* Normal mode */
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cmd[3] = cpu_to_be32(OCC_P9_SRAM_RSP_ADDR + offset);
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break;
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case occ_p10:
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idx = 1;
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cmd_len = 6;
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cmd[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
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cmd[3] = 0;
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cmd[4] = cpu_to_be32(OCC_P10_SRAM_RSP_ADDR + offset);
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break;
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}
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cmd[0] = cpu_to_be32(cmd_len);
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cmd[1] = cpu_to_be32(SBEFIFO_CMD_GET_OCC_SRAM);
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cmd[4 + idx] = cpu_to_be32(data_len);
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rc = sbefifo_submit(occ->sbefifo, cmd, cmd_len, resp, &resp_len);
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if (rc)
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return rc;
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rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_GET_OCC_SRAM,
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resp, resp_len, &parsed_len);
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if (rc > 0) {
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dev_err(occ->dev, "SRAM read returned failure status: %08x\n",
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rc);
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occ_save_ffdc(occ, resp, parsed_len, resp_len);
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return -ECOMM;
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} else if (rc) {
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return rc;
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}
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resp_data_len = be32_to_cpu(resp[parsed_len - 1]);
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if (resp_data_len != data_len) {
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dev_err(occ->dev, "SRAM read expected %d bytes got %zd\n",
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data_len, resp_data_len);
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rc = -EBADMSG;
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} else {
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memcpy(data, resp, len);
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}
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return rc;
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}
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static int occ_putsram(struct occ *occ, const void *data, ssize_t len,
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u8 seq_no, u16 checksum)
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{
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u32 data_len = ((len + 7) / 8) * 8; /* must be multiples of 8 B */
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size_t cmd_len, parsed_len, resp_data_len;
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size_t resp_len = OCC_MAX_RESP_WORDS;
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__be32 *buf = occ->buffer;
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u8 *byte_buf;
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int idx = 0, rc;
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cmd_len = (occ->version == occ_p10) ? 6 : 5;
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cmd_len += data_len >> 2;
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/*
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* Magic sequence to do SBE putsram command. SBE will transfer
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* data to specified SRAM address.
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*/
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buf[0] = cpu_to_be32(cmd_len);
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buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
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switch (occ->version) {
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default:
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case occ_p9:
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buf[2] = cpu_to_be32(1); /* Normal mode */
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buf[3] = cpu_to_be32(OCC_P9_SRAM_CMD_ADDR);
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break;
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case occ_p10:
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idx = 1;
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buf[2] = cpu_to_be32(OCC_P10_SRAM_MODE);
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buf[3] = 0;
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buf[4] = cpu_to_be32(OCC_P10_SRAM_CMD_ADDR);
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break;
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}
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buf[4 + idx] = cpu_to_be32(data_len);
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memcpy(&buf[5 + idx], data, len);
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byte_buf = (u8 *)&buf[5 + idx];
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/*
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* Overwrite the first byte with our sequence number and the last two
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* bytes with the checksum.
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*/
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byte_buf[0] = seq_no;
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byte_buf[len - 2] = checksum >> 8;
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byte_buf[len - 1] = checksum & 0xff;
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rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
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if (rc)
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return rc;
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rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
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buf, resp_len, &parsed_len);
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if (rc > 0) {
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dev_err(occ->dev, "SRAM write returned failure status: %08x\n",
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rc);
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occ_save_ffdc(occ, buf, parsed_len, resp_len);
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return -ECOMM;
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} else if (rc) {
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return rc;
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}
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if (parsed_len != 1) {
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dev_err(occ->dev, "SRAM write response length invalid: %zd\n",
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parsed_len);
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rc = -EBADMSG;
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} else {
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resp_data_len = be32_to_cpu(buf[0]);
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if (resp_data_len != data_len) {
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dev_err(occ->dev,
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"SRAM write expected %d bytes got %zd\n",
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data_len, resp_data_len);
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rc = -EBADMSG;
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}
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}
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return rc;
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}
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static int occ_trigger_attn(struct occ *occ)
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{
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__be32 *buf = occ->buffer;
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size_t cmd_len, parsed_len, resp_data_len;
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size_t resp_len = OCC_MAX_RESP_WORDS;
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int idx = 0, rc;
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switch (occ->version) {
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default:
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case occ_p9:
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cmd_len = 7;
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buf[2] = cpu_to_be32(3); /* Circular mode */
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buf[3] = 0;
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break;
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case occ_p10:
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idx = 1;
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cmd_len = 8;
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buf[2] = cpu_to_be32(0xd0); /* Circular mode, OCB Channel 1 */
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buf[3] = 0;
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buf[4] = 0;
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break;
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}
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buf[0] = cpu_to_be32(cmd_len); /* Chip-op length in words */
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buf[1] = cpu_to_be32(SBEFIFO_CMD_PUT_OCC_SRAM);
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buf[4 + idx] = cpu_to_be32(8); /* Data length in bytes */
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buf[5 + idx] = cpu_to_be32(0x20010000); /* Trigger OCC attention */
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buf[6 + idx] = 0;
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rc = sbefifo_submit(occ->sbefifo, buf, cmd_len, buf, &resp_len);
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if (rc)
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return rc;
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rc = sbefifo_parse_status(occ->sbefifo, SBEFIFO_CMD_PUT_OCC_SRAM,
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buf, resp_len, &parsed_len);
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if (rc > 0) {
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dev_err(occ->dev, "SRAM attn returned failure status: %08x\n",
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rc);
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occ_save_ffdc(occ, buf, parsed_len, resp_len);
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return -ECOMM;
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} else if (rc) {
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return rc;
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}
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if (parsed_len != 1) {
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dev_err(occ->dev, "SRAM attn response length invalid: %zd\n",
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parsed_len);
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rc = -EBADMSG;
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} else {
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resp_data_len = be32_to_cpu(buf[0]);
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if (resp_data_len != 8) {
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dev_err(occ->dev,
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"SRAM attn expected 8 bytes got %zd\n",
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resp_data_len);
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rc = -EBADMSG;
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}
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}
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return rc;
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}
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int fsi_occ_submit(struct device *dev, const void *request, size_t req_len,
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void *response, size_t *resp_len)
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{
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const unsigned long timeout = msecs_to_jiffies(OCC_TIMEOUT_MS);
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const unsigned long wait_time =
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msecs_to_jiffies(OCC_CMD_IN_PRG_WAIT_MS);
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struct occ *occ = dev_get_drvdata(dev);
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struct occ_response *resp = response;
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size_t user_resp_len = *resp_len;
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u8 seq_no;
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u16 checksum = 0;
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u16 resp_data_length;
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const u8 *byte_request = (const u8 *)request;
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unsigned long start;
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int rc;
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size_t i;
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*resp_len = 0;
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if (!occ)
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return -ENODEV;
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if (user_resp_len < 7) {
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dev_dbg(dev, "Bad resplen %zd\n", user_resp_len);
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return -EINVAL;
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}
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/* Checksum the request, ignoring first byte (sequence number). */
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for (i = 1; i < req_len - 2; ++i)
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checksum += byte_request[i];
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mutex_lock(&occ->occ_lock);
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occ->client_buffer = response;
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occ->client_buffer_size = user_resp_len;
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occ->client_response_size = 0;
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/*
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* Get a sequence number and update the counter. Avoid a sequence
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* number of 0 which would pass the response check below even if the
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* OCC response is uninitialized. Any sequence number the user is
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* trying to send is overwritten since this function is the only common
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* interface to the OCC and therefore the only place we can guarantee
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* unique sequence numbers.
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*/
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seq_no = occ->sequence_number++;
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if (!occ->sequence_number)
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occ->sequence_number = 1;
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checksum += seq_no;
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rc = occ_putsram(occ, request, req_len, seq_no, checksum);
|
|
if (rc)
|
|
goto done;
|
|
|
|
rc = occ_trigger_attn(occ);
|
|
if (rc)
|
|
goto done;
|
|
|
|
/* Read occ response header */
|
|
start = jiffies;
|
|
do {
|
|
rc = occ_getsram(occ, 0, resp, 8);
|
|
if (rc)
|
|
goto done;
|
|
|
|
if (resp->return_status == OCC_RESP_CMD_IN_PRG ||
|
|
resp->return_status == OCC_RESP_CRIT_INIT ||
|
|
resp->seq_no != seq_no) {
|
|
rc = -ETIMEDOUT;
|
|
|
|
if (time_after(jiffies, start + timeout)) {
|
|
dev_err(occ->dev, "resp timeout status=%02x "
|
|
"resp seq_no=%d our seq_no=%d\n",
|
|
resp->return_status, resp->seq_no,
|
|
seq_no);
|
|
goto done;
|
|
}
|
|
|
|
set_current_state(TASK_UNINTERRUPTIBLE);
|
|
schedule_timeout(wait_time);
|
|
}
|
|
} while (rc);
|
|
|
|
/* Extract size of response data */
|
|
resp_data_length = get_unaligned_be16(&resp->data_length);
|
|
|
|
/* Message size is data length + 5 bytes header + 2 bytes checksum */
|
|
if ((resp_data_length + 7) > user_resp_len) {
|
|
rc = -EMSGSIZE;
|
|
goto done;
|
|
}
|
|
|
|
dev_dbg(dev, "resp_status=%02x resp_data_len=%d\n",
|
|
resp->return_status, resp_data_length);
|
|
|
|
/* Grab the rest */
|
|
if (resp_data_length > 1) {
|
|
/* already got 3 bytes resp, also need 2 bytes checksum */
|
|
rc = occ_getsram(occ, 8, &resp->data[3], resp_data_length - 1);
|
|
if (rc)
|
|
goto done;
|
|
}
|
|
|
|
occ->client_response_size = resp_data_length + 7;
|
|
rc = occ_verify_checksum(occ, resp, resp_data_length);
|
|
|
|
done:
|
|
*resp_len = occ->client_response_size;
|
|
mutex_unlock(&occ->occ_lock);
|
|
|
|
return rc;
|
|
}
|
|
EXPORT_SYMBOL_GPL(fsi_occ_submit);
|
|
|
|
static int occ_unregister_child(struct device *dev, void *data)
|
|
{
|
|
struct platform_device *hwmon_dev = to_platform_device(dev);
|
|
|
|
platform_device_unregister(hwmon_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int occ_probe(struct platform_device *pdev)
|
|
{
|
|
int rc;
|
|
u32 reg;
|
|
struct occ *occ;
|
|
struct platform_device *hwmon_dev;
|
|
struct device *dev = &pdev->dev;
|
|
struct platform_device_info hwmon_dev_info = {
|
|
.parent = dev,
|
|
.name = "occ-hwmon",
|
|
};
|
|
|
|
occ = devm_kzalloc(dev, sizeof(*occ), GFP_KERNEL);
|
|
if (!occ)
|
|
return -ENOMEM;
|
|
|
|
/* SBE words are always four bytes */
|
|
occ->buffer = kvmalloc(OCC_MAX_RESP_WORDS * 4, GFP_KERNEL);
|
|
if (!occ->buffer)
|
|
return -ENOMEM;
|
|
|
|
occ->version = (uintptr_t)of_device_get_match_data(dev);
|
|
occ->dev = dev;
|
|
occ->sbefifo = dev->parent;
|
|
occ->sequence_number = 1;
|
|
mutex_init(&occ->occ_lock);
|
|
|
|
if (dev->of_node) {
|
|
rc = of_property_read_u32(dev->of_node, "reg", ®);
|
|
if (!rc) {
|
|
/* make sure we don't have a duplicate from dts */
|
|
occ->idx = ida_simple_get(&occ_ida, reg, reg + 1,
|
|
GFP_KERNEL);
|
|
if (occ->idx < 0)
|
|
occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
|
|
GFP_KERNEL);
|
|
} else {
|
|
occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX,
|
|
GFP_KERNEL);
|
|
}
|
|
} else {
|
|
occ->idx = ida_simple_get(&occ_ida, 1, INT_MAX, GFP_KERNEL);
|
|
}
|
|
|
|
platform_set_drvdata(pdev, occ);
|
|
|
|
snprintf(occ->name, sizeof(occ->name), "occ%d", occ->idx);
|
|
occ->mdev.fops = &occ_fops;
|
|
occ->mdev.minor = MISC_DYNAMIC_MINOR;
|
|
occ->mdev.name = occ->name;
|
|
occ->mdev.parent = dev;
|
|
|
|
rc = misc_register(&occ->mdev);
|
|
if (rc) {
|
|
dev_err(dev, "failed to register miscdevice: %d\n", rc);
|
|
ida_simple_remove(&occ_ida, occ->idx);
|
|
kvfree(occ->buffer);
|
|
return rc;
|
|
}
|
|
|
|
hwmon_dev_info.id = occ->idx;
|
|
hwmon_dev = platform_device_register_full(&hwmon_dev_info);
|
|
if (IS_ERR(hwmon_dev))
|
|
dev_warn(dev, "failed to create hwmon device\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int occ_remove(struct platform_device *pdev)
|
|
{
|
|
struct occ *occ = platform_get_drvdata(pdev);
|
|
|
|
kvfree(occ->buffer);
|
|
|
|
misc_deregister(&occ->mdev);
|
|
|
|
device_for_each_child(&pdev->dev, NULL, occ_unregister_child);
|
|
|
|
ida_simple_remove(&occ_ida, occ->idx);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id occ_match[] = {
|
|
{
|
|
.compatible = "ibm,p9-occ",
|
|
.data = (void *)occ_p9
|
|
},
|
|
{
|
|
.compatible = "ibm,p10-occ",
|
|
.data = (void *)occ_p10
|
|
},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, occ_match);
|
|
|
|
static struct platform_driver occ_driver = {
|
|
.driver = {
|
|
.name = "occ",
|
|
.of_match_table = occ_match,
|
|
},
|
|
.probe = occ_probe,
|
|
.remove = occ_remove,
|
|
};
|
|
|
|
static int occ_init(void)
|
|
{
|
|
return platform_driver_register(&occ_driver);
|
|
}
|
|
|
|
static void occ_exit(void)
|
|
{
|
|
platform_driver_unregister(&occ_driver);
|
|
|
|
ida_destroy(&occ_ida);
|
|
}
|
|
|
|
module_init(occ_init);
|
|
module_exit(occ_exit);
|
|
|
|
MODULE_AUTHOR("Eddie James <eajames@linux.ibm.com>");
|
|
MODULE_DESCRIPTION("BMC P9 OCC driver");
|
|
MODULE_LICENSE("GPL");
|