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0ae797a8ba
This patch adds support for Video Image Compositor engine which can be used for 2d operations. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
312 lines
7.9 KiB
C
312 lines
7.9 KiB
C
/*
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* Copyright (c) 2009-2013, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef __LINUX_HOST1X_H
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#define __LINUX_HOST1X_H
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#include <linux/device.h>
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#include <linux/types.h>
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enum host1x_class {
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HOST1X_CLASS_HOST1X = 0x1,
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HOST1X_CLASS_GR2D = 0x51,
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HOST1X_CLASS_GR2D_SB = 0x52,
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HOST1X_CLASS_VIC = 0x5D,
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HOST1X_CLASS_GR3D = 0x60,
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};
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struct host1x_client;
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struct host1x_client_ops {
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int (*init)(struct host1x_client *client);
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int (*exit)(struct host1x_client *client);
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};
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struct host1x_client {
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struct list_head list;
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struct device *parent;
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struct device *dev;
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const struct host1x_client_ops *ops;
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enum host1x_class class;
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struct host1x_channel *channel;
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struct host1x_syncpt **syncpts;
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unsigned int num_syncpts;
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};
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/*
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* host1x buffer objects
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*/
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struct host1x_bo;
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struct sg_table;
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struct host1x_bo_ops {
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struct host1x_bo *(*get)(struct host1x_bo *bo);
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void (*put)(struct host1x_bo *bo);
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dma_addr_t (*pin)(struct host1x_bo *bo, struct sg_table **sgt);
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void (*unpin)(struct host1x_bo *bo, struct sg_table *sgt);
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void *(*mmap)(struct host1x_bo *bo);
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void (*munmap)(struct host1x_bo *bo, void *addr);
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void *(*kmap)(struct host1x_bo *bo, unsigned int pagenum);
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void (*kunmap)(struct host1x_bo *bo, unsigned int pagenum, void *addr);
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};
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struct host1x_bo {
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const struct host1x_bo_ops *ops;
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};
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static inline void host1x_bo_init(struct host1x_bo *bo,
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const struct host1x_bo_ops *ops)
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{
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bo->ops = ops;
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}
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static inline struct host1x_bo *host1x_bo_get(struct host1x_bo *bo)
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{
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return bo->ops->get(bo);
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}
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static inline void host1x_bo_put(struct host1x_bo *bo)
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{
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bo->ops->put(bo);
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}
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static inline dma_addr_t host1x_bo_pin(struct host1x_bo *bo,
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struct sg_table **sgt)
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{
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return bo->ops->pin(bo, sgt);
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}
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static inline void host1x_bo_unpin(struct host1x_bo *bo, struct sg_table *sgt)
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{
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bo->ops->unpin(bo, sgt);
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}
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static inline void *host1x_bo_mmap(struct host1x_bo *bo)
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{
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return bo->ops->mmap(bo);
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}
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static inline void host1x_bo_munmap(struct host1x_bo *bo, void *addr)
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{
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bo->ops->munmap(bo, addr);
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}
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static inline void *host1x_bo_kmap(struct host1x_bo *bo, unsigned int pagenum)
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{
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return bo->ops->kmap(bo, pagenum);
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}
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static inline void host1x_bo_kunmap(struct host1x_bo *bo,
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unsigned int pagenum, void *addr)
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{
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bo->ops->kunmap(bo, pagenum, addr);
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}
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/*
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* host1x syncpoints
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*/
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#define HOST1X_SYNCPT_CLIENT_MANAGED (1 << 0)
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#define HOST1X_SYNCPT_HAS_BASE (1 << 1)
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struct host1x_syncpt_base;
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struct host1x_syncpt;
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struct host1x;
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struct host1x_syncpt *host1x_syncpt_get(struct host1x *host, u32 id);
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u32 host1x_syncpt_id(struct host1x_syncpt *sp);
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u32 host1x_syncpt_read_min(struct host1x_syncpt *sp);
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u32 host1x_syncpt_read_max(struct host1x_syncpt *sp);
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u32 host1x_syncpt_read(struct host1x_syncpt *sp);
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int host1x_syncpt_incr(struct host1x_syncpt *sp);
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u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs);
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int host1x_syncpt_wait(struct host1x_syncpt *sp, u32 thresh, long timeout,
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u32 *value);
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struct host1x_syncpt *host1x_syncpt_request(struct device *dev,
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unsigned long flags);
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void host1x_syncpt_free(struct host1x_syncpt *sp);
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struct host1x_syncpt_base *host1x_syncpt_get_base(struct host1x_syncpt *sp);
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u32 host1x_syncpt_base_id(struct host1x_syncpt_base *base);
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/*
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* host1x channel
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*/
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struct host1x_channel;
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struct host1x_job;
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struct host1x_channel *host1x_channel_request(struct device *dev);
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void host1x_channel_free(struct host1x_channel *channel);
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struct host1x_channel *host1x_channel_get(struct host1x_channel *channel);
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void host1x_channel_put(struct host1x_channel *channel);
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int host1x_job_submit(struct host1x_job *job);
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/*
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* host1x job
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*/
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struct host1x_reloc {
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struct {
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struct host1x_bo *bo;
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unsigned long offset;
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} cmdbuf;
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struct {
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struct host1x_bo *bo;
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unsigned long offset;
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} target;
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unsigned long shift;
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};
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struct host1x_job {
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/* When refcount goes to zero, job can be freed */
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struct kref ref;
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/* List entry */
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struct list_head list;
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/* Channel where job is submitted to */
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struct host1x_channel *channel;
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u32 client;
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/* Gathers and their memory */
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struct host1x_job_gather *gathers;
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unsigned int num_gathers;
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/* Wait checks to be processed at submit time */
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struct host1x_waitchk *waitchk;
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unsigned int num_waitchk;
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u32 waitchk_mask;
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/* Array of handles to be pinned & unpinned */
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struct host1x_reloc *relocarray;
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unsigned int num_relocs;
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struct host1x_job_unpin_data *unpins;
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unsigned int num_unpins;
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dma_addr_t *addr_phys;
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dma_addr_t *gather_addr_phys;
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dma_addr_t *reloc_addr_phys;
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/* Sync point id, number of increments and end related to the submit */
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u32 syncpt_id;
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u32 syncpt_incrs;
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u32 syncpt_end;
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/* Maximum time to wait for this job */
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unsigned int timeout;
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/* Index and number of slots used in the push buffer */
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unsigned int first_get;
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unsigned int num_slots;
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/* Copy of gathers */
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size_t gather_copy_size;
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dma_addr_t gather_copy;
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u8 *gather_copy_mapped;
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/* Check if register is marked as an address reg */
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int (*is_addr_reg)(struct device *dev, u32 reg, u32 class);
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/* Request a SETCLASS to this class */
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u32 class;
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/* Add a channel wait for previous ops to complete */
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bool serialize;
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};
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struct host1x_job *host1x_job_alloc(struct host1x_channel *ch,
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u32 num_cmdbufs, u32 num_relocs,
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u32 num_waitchks);
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void host1x_job_add_gather(struct host1x_job *job, struct host1x_bo *mem_id,
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u32 words, u32 offset);
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struct host1x_job *host1x_job_get(struct host1x_job *job);
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void host1x_job_put(struct host1x_job *job);
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int host1x_job_pin(struct host1x_job *job, struct device *dev);
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void host1x_job_unpin(struct host1x_job *job);
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/*
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* subdevice probe infrastructure
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*/
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struct host1x_device;
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struct host1x_driver {
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struct device_driver driver;
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const struct of_device_id *subdevs;
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struct list_head list;
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int (*probe)(struct host1x_device *device);
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int (*remove)(struct host1x_device *device);
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void (*shutdown)(struct host1x_device *device);
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};
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static inline struct host1x_driver *
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to_host1x_driver(struct device_driver *driver)
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{
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return container_of(driver, struct host1x_driver, driver);
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}
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int host1x_driver_register_full(struct host1x_driver *driver,
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struct module *owner);
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void host1x_driver_unregister(struct host1x_driver *driver);
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#define host1x_driver_register(driver) \
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host1x_driver_register_full(driver, THIS_MODULE)
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struct host1x_device {
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struct host1x_driver *driver;
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struct list_head list;
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struct device dev;
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struct mutex subdevs_lock;
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struct list_head subdevs;
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struct list_head active;
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struct mutex clients_lock;
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struct list_head clients;
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bool registered;
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};
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static inline struct host1x_device *to_host1x_device(struct device *dev)
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{
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return container_of(dev, struct host1x_device, dev);
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}
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int host1x_device_init(struct host1x_device *device);
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int host1x_device_exit(struct host1x_device *device);
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int host1x_client_register(struct host1x_client *client);
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int host1x_client_unregister(struct host1x_client *client);
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struct tegra_mipi_device;
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struct tegra_mipi_device *tegra_mipi_request(struct device *device);
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void tegra_mipi_free(struct tegra_mipi_device *device);
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int tegra_mipi_enable(struct tegra_mipi_device *device);
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int tegra_mipi_disable(struct tegra_mipi_device *device);
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int tegra_mipi_calibrate(struct tegra_mipi_device *device);
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#endif
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