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fc5e0e3762
Add a few more clocks that will be used in follow-up patches to enable more functionality on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
18 lines
410 B
C
18 lines
410 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved. */
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#ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H
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#define DT_BINDINGS_RESET_TEGRA234_RESET_H
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/**
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* @file
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* @defgroup bpmp_reset_ids Reset ID's
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* @brief Identifiers for Resets controllable by firmware
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* @{
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*/
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#define TEGRA234_RESET_SDMMC4 85U
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#define TEGRA234_RESET_UARTA 100U
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/** @} */
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#endif
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