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By default, it is assumed that the UTMI clock is generated from a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ field of the SFR_UTMICKTRIM has to be updated to generate the UTMI clock in the proper way. The UTMI clock has a fixed rate of 480 MHz. In fact, there is no multiplier we can configure. The multiplier is managed internally, depending on the reference clock frequency, to achieve the target of 480 MHz. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by: Ingo van Lil <inguin@gmx.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
34 lines
1.1 KiB
C
34 lines
1.1 KiB
C
/*
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* Atmel SFR (Special Function Registers) register offsets and bit definitions.
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*
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* Copyright (C) 2016 Atmel
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*
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* Author: Ludovic Desroches <ludovic.desroches@atmel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _LINUX_MFD_SYSCON_ATMEL_SFR_H
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#define _LINUX_MFD_SYSCON_ATMEL_SFR_H
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#define AT91_SFR_DDRCFG 0x04 /* DDR Configuration Register */
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/* 0x08 ~ 0x0c: Reserved */
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#define AT91_SFR_OHCIICR 0x10 /* OHCI INT Configuration Register */
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#define AT91_SFR_OHCIISR 0x14 /* OHCI INT Status Register */
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#define AT91_SFR_UTMICKTRIM 0x30 /* UTMI Clock Trimming Register */
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#define AT91_SFR_I2SCLKSEL 0x90 /* I2SC Register */
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/* Field definitions */
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#define AT91_OHCIICR_SUSPEND_A BIT(8)
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#define AT91_OHCIICR_SUSPEND_B BIT(9)
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#define AT91_OHCIICR_SUSPEND_C BIT(10)
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#define AT91_OHCIICR_USB_SUSPEND (AT91_OHCIICR_SUSPEND_A | \
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AT91_OHCIICR_SUSPEND_B | \
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AT91_OHCIICR_SUSPEND_C)
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#define AT91_UTMICKTRIM_FREQ GENMASK(1, 0)
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#endif /* _LINUX_MFD_SYSCON_ATMEL_SFR_H */
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