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9eb0e5f9b2
The DAI mode is and should be configured by the sound card driver as codec and ssi have to be in the right modes to communicate with each other. It is possible to operate the ssi unit or the codec in master mode, sometimes even on the same board in different configurations. With the latest changes in the fsl-ssi driver, the 'fsl,mode' property is only handled as a fallback property. If the sound card sets the DAI mode correctly, this fallback configuration is dropped. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
283 lines
6.3 KiB
Text
283 lines
6.3 KiB
Text
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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/ {
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_2p5v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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sound {
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compatible = "fsl,imx6-wandboard-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6-wandboard-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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sound-spdif {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-spdif";
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spdif-controller = <&spdif>;
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spdif-out;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c1>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks 201>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6qdl-wandboard {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
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MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 /* WL_REF_ON */
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* WL_RST_N */
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MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */
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MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */
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MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */
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MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
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>;
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};
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_spdif: spdifgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio3 29 0>;
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interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
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<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
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status = "okay";
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};
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&spdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif>;
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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dr_mode = "peripheral";
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio1 2 0>;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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non-removable;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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cd-gpios = <&gpio3 9 0>;
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status = "okay";
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};
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