Laurent Pinchart 9f007e7b66 dmaengine: xilinx: dpdma: Limit descriptor IDs to 16 bits ... While the descriptor ID is stored in a 32-bit field in the hardware descriptor, only 16 bits are used by the hardware and are reported through the XILINX_DPDMA_CH_DESC_ID register. Failure to handle the wrap-around results in a descriptor ID mismatch after 65536 frames. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Jianqiang Chen <jianqiang.chen@xilinx.com> Reviewed-by: Jianqiang Chen <jianqiang.chen@xilinx.com> Link: https://lore.kernel.org/r/20210520152420.23986-5-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2021-05-31 09:37:17 +05:30
..
Makefile	dmaengine: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver	2020-07-17 11:37:59 +05:30
xilinx_dma.c	dmaengine: xilinx: Introduce synchronize() callback	2021-03-16 16:15:32 +05:30
xilinx_dpdma.c	dmaengine: xilinx: dpdma: Limit descriptor IDs to 16 bits	2021-05-31 09:37:17 +05:30
zynqmp_dma.c	dmaengine: zynqmp_dma: Fix PM reference leak in zynqmp_dma_alloc_chan_resourc()	2021-05-31 09:33:09 +05:30