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2abc75a8c5
On platforms such as Cortex-A15 based OMAP5, SCU is not used, however since much code is shared between Cortex-A9 based OMAP4 (which uses SCU) and OMAP5, It does help to have inline functions returning error values when SCU is not present on the platform. arch/arm/mach-omap2/omap-smp.c which is common between OMAP4 and 5 handles the SCU usage only for OMAP4. This fixes the following build failure with OMAP5 only build: arch/arm/mach-omap2/built-in.o: In function `omap4_smp_init_cpus': arch/arm/mach-omap2/omap-smp.c:185: undefined reference to `scu_get_core_count' arch/arm/mach-omap2/built-in.o: In function `omap4_smp_prepare_cpus': arch/arm/mach-omap2/omap-smp.c:211: undefined reference to `scu_enable' Reported-by: Pekon Gupta <pekon@ti.com> Reported-by: Vincent Stehlé <v-stehle@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
48 lines
929 B
C
48 lines
929 B
C
#ifndef __ASMARM_ARCH_SCU_H
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#define __ASMARM_ARCH_SCU_H
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#define SCU_PM_NORMAL 0
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#define SCU_PM_DORMANT 2
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#define SCU_PM_POWEROFF 3
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#ifndef __ASSEMBLER__
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#include <asm/cputype.h>
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static inline bool scu_a9_has_base(void)
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{
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return read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
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}
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static inline unsigned long scu_a9_get_base(void)
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{
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unsigned long pa;
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
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return pa;
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}
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#ifdef CONFIG_HAVE_ARM_SCU
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unsigned int scu_get_core_count(void __iomem *);
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int scu_power_mode(void __iomem *, unsigned int);
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#else
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static inline unsigned int scu_get_core_count(void __iomem *scu_base)
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{
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return 0;
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}
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static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
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{
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return -EINVAL;
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}
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#endif
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#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
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void scu_enable(void __iomem *scu_base);
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#else
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static inline void scu_enable(void __iomem *scu_base) {}
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#endif
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#endif
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#endif
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