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![Linus Torvalds](/assets/img/avatar_default.png)
These changes are all for board specific files. These used to make up a large portion of the ARM changes in the past, but as we are generalizing the support and moving to device tree probing, this has gotten significantly smaller. The only platform actually adding new code here at the moment is Renesas shmobile, as they are still busy converting their code to device tree and have not come far enough to not need it. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRhKYeAAoJEIwa5zzehBx3ez8QAKLnzjAQJzhfJezJ+g02tXS9 xIikiX1zmEb3HuF8Z/SFRWVj2Zbe+cBaDpr7JERmmOTWWUtxHbqIPFr2xUbyi0qY d1yBFEtAv+Pf6lgIGRHPejCXigInp0ew94+VMih7rOVkXdNZqLBP+Z4CEntoak+H 1+c4MvW/37VlyQUnsrQgUcC7mu9lSIVwJjYXCGJVs4cKwYYnLNH6tLINx62SOCkW cdoJV/eTvRWD6Wx8kxvNE7WJMVNuB8e7R7DKkn5SES9beWJ1tvcGtNS2KaK8rFdC Xee8SNo2RzxDQwtkPYA2iZg9Gs3vxNEiy3AX0Tsvji7a3ipQk/M13NlOa1h+tu4w 8wNZDccYOsFejlnpnDWk64eVmu2w0c58CWbRaPYOOkGJ5pTnZ9+2cO7CLTOmQWrb y2Vdly10vQR7AbnlgLlx9RuIAdAVoMGVwCO1JrnBonRriXQCq/vSEFfhKbLK4/MO FYyW+sy222f+kv1JrEdffO7rdIc/EdHRkiGSeVFQ63ETl6F+wx7zEMwb+RV2ysi3 zQQJDeMTrP9StqKaBfyOS3IF+Jbv/f4dM6oKxwlyR5kwuO+J1H6yFG3ugBSuED82 eUz1O35Q1JY593qS8XD22wMjRQt3xhwdrD0hAZnCbUiJxe1Tatf16bBloBQ8vwsY hHdiINWICRawVJLK7SZB =2cfP -----END PGP SIGNATURE----- Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC board specific changes (part 1) from Olof Johansson: "These changes are all for board specific files. These used to make up a large portion of the ARM changes in the past, but as we are generalizing the support and moving to device tree probing, this has gotten significantly smaller. The only platform actually adding new code here at the moment is Renesas shmobile, as they are still busy converting their code to device tree and have not come far enough to not need it." * tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits) ARM: msm: USB_MSM_OTG needs USB_PHY ARM: davinci: da850 evm: fix const qualifier placement ARM: davinci: da850 board: add remoteproc support ARM: pxa: move debug uart code ARM: pxa: select PXA935 on saar & tavorevb ARM: mmp: add more compatible names in gpio driver ARM: pxa: move PXA_GPIO_TO_IRQ macro ARM: pxa: remove cpu_is_xxx in gpio driver ARM: Kirkwood: update Network Space Mini v2 description ARM: Kirkwood: DT board setup for CloudBox ARM: Kirkwood: sort board entries by ASCII-code order ARM: OMAP: board-4430sdp: Provide regulator to pwm-backlight ARM: OMAP: zoom: Use pwm stack for lcd and keyboard backlight ARM: OMAP2+: omap2plus_defconfig: Add support for BMP085 pressure sensor omap2+: Remove useless Makefile line omap2+: Remove useless Makefile line ARM: OMAP: RX-51: add missing regulator supply definitions for lis3lv02d ARM: OMAP1: fix omap_udc registration ARM: davinci: use is IS_ENABLED macro ARM: kirkwood: add MACH_GURUPLUG_DT to defconfig ...
833 lines
18 KiB
C
833 lines
18 KiB
C
/*
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* TI DaVinci DM646X EVM board
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*
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* Derived from: arch/arm/mach-davinci/board-evm.c
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* Copyright (C) 2006 Texas Instruments.
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*
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* (C) 2007-2008, MontaVista Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*
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*/
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/**************************************************************************
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* Included Files
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**************************************************************************/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/i2c/pcf857x.h>
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#include <media/tvp514x.h>
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#include <media/adv7343.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/clk.h>
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#include <linux/export.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include <mach/serial.h>
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#include <linux/platform_data/i2c-davinci.h>
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#include <linux/platform_data/mtd-davinci.h>
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#include <mach/clock.h>
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#include <mach/cdce949.h>
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#include <linux/platform_data/mtd-davinci-aemif.h>
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#include "davinci.h"
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#include "clock.h"
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#define NAND_BLOCK_SIZE SZ_128K
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/* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
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* and U-Boot environment this avoids dependency on any particular combination
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* of UBL, U-Boot or flashing tools etc.
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*/
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static struct mtd_partition davinci_nand_partitions[] = {
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{
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/* UBL, U-Boot with environment */
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.name = "bootloader",
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.offset = MTDPART_OFS_APPEND,
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.size = 16 * NAND_BLOCK_SIZE,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4M,
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.mask_flags = 0,
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}, {
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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}
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};
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static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
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.wsetup = 29,
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.wstrobe = 24,
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.whold = 14,
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.rsetup = 19,
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.rstrobe = 33,
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.rhold = 0,
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.ta = 29,
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.mask_cle = 0x80000,
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.mask_ale = 0x40000,
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.options = 0,
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};
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static struct resource davinci_nand_resources[] = {
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{
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.start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
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.end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = DM646X_ASYNC_EMIF_CONTROL_BASE,
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.end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device davinci_nand_device = {
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.name = "davinci_nand",
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.id = 0,
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.num_resources = ARRAY_SIZE(davinci_nand_resources),
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.resource = davinci_nand_resources,
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.dev = {
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.platform_data = &davinci_nand_data,
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},
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};
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#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
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/* CPLD Register 0 bits to control ATA */
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#define DM646X_EVM_ATA_RST BIT(0)
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#define DM646X_EVM_ATA_PWD BIT(1)
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/* CPLD Register 0 Client: used for I/O Control */
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static int cpld_reg0_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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if (HAS_ATA) {
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u8 data;
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struct i2c_msg msg[2] = {
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{
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.addr = client->addr,
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.flags = I2C_M_RD,
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.len = 1,
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.buf = &data,
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},
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{
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.addr = client->addr,
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.flags = 0,
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.len = 1,
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.buf = &data,
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},
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};
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/* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
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i2c_transfer(client->adapter, msg, 1);
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data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
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i2c_transfer(client->adapter, msg + 1, 1);
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}
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return 0;
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}
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static const struct i2c_device_id cpld_reg_ids[] = {
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{ "cpld_reg0", 0, },
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{ },
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};
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static struct i2c_driver dm6467evm_cpld_driver = {
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.driver.name = "cpld_reg0",
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.id_table = cpld_reg_ids,
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.probe = cpld_reg0_probe,
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};
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/* LEDS */
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static struct gpio_led evm_leds[] = {
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{ .name = "DS1", .active_low = 1, },
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{ .name = "DS2", .active_low = 1, },
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{ .name = "DS3", .active_low = 1, },
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{ .name = "DS4", .active_low = 1, },
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};
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static const struct gpio_led_platform_data evm_led_data = {
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.num_leds = ARRAY_SIZE(evm_leds),
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.leds = evm_leds,
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};
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static struct platform_device *evm_led_dev;
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static int evm_led_setup(struct i2c_client *client, int gpio,
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unsigned int ngpio, void *c)
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{
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struct gpio_led *leds = evm_leds;
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int status;
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while (ngpio--) {
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leds->gpio = gpio++;
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leds++;
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}
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evm_led_dev = platform_device_alloc("leds-gpio", 0);
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platform_device_add_data(evm_led_dev, &evm_led_data,
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sizeof(evm_led_data));
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evm_led_dev->dev.parent = &client->dev;
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status = platform_device_add(evm_led_dev);
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if (status < 0) {
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platform_device_put(evm_led_dev);
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evm_led_dev = NULL;
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}
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return status;
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}
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static int evm_led_teardown(struct i2c_client *client, int gpio,
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unsigned ngpio, void *c)
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{
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if (evm_led_dev) {
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platform_device_unregister(evm_led_dev);
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evm_led_dev = NULL;
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}
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return 0;
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}
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static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
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static int evm_sw_setup(struct i2c_client *client, int gpio,
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unsigned ngpio, void *c)
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{
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int status;
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int i;
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char label[10];
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for (i = 0; i < 4; ++i) {
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snprintf(label, 10, "user_sw%d", i);
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status = gpio_request(gpio, label);
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if (status)
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goto out_free;
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evm_sw_gpio[i] = gpio++;
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status = gpio_direction_input(evm_sw_gpio[i]);
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if (status) {
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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goto out_free;
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}
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status = gpio_export(evm_sw_gpio[i], 0);
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if (status) {
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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goto out_free;
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}
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}
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return status;
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out_free:
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for (i = 0; i < 4; ++i) {
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if (evm_sw_gpio[i] != -EINVAL) {
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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}
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}
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return status;
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}
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static int evm_sw_teardown(struct i2c_client *client, int gpio,
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unsigned ngpio, void *c)
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{
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int i;
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for (i = 0; i < 4; ++i) {
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if (evm_sw_gpio[i] != -EINVAL) {
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gpio_unexport(evm_sw_gpio[i]);
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gpio_free(evm_sw_gpio[i]);
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evm_sw_gpio[i] = -EINVAL;
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}
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}
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return 0;
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}
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static int evm_pcf_setup(struct i2c_client *client, int gpio,
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unsigned int ngpio, void *c)
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{
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int status;
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if (ngpio < 8)
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return -EINVAL;
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status = evm_sw_setup(client, gpio, 4, c);
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if (status)
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return status;
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return evm_led_setup(client, gpio+4, 4, c);
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}
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static int evm_pcf_teardown(struct i2c_client *client, int gpio,
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unsigned int ngpio, void *c)
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{
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BUG_ON(ngpio < 8);
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evm_sw_teardown(client, gpio, 4, c);
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evm_led_teardown(client, gpio+4, 4, c);
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return 0;
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}
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static struct pcf857x_platform_data pcf_data = {
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.gpio_base = DAVINCI_N_GPIO+1,
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.setup = evm_pcf_setup,
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.teardown = evm_pcf_teardown,
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};
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/* Most of this EEPROM is unused, but U-Boot uses some data:
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* - 0x7f00, 6 bytes Ethernet Address
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* - ... newer boards may have more
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*/
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static struct at24_platform_data eeprom_info = {
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.byte_len = (256*1024) / 8,
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.page_size = 64,
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.flags = AT24_FLAG_ADDR16,
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.setup = davinci_get_mac_addr,
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.context = (void *)0x7f00,
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};
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static u8 dm646x_iis_serializer_direction[] = {
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TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
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};
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static u8 dm646x_dit_serializer_direction[] = {
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TX_MODE,
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};
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static struct snd_platform_data dm646x_evm_snd_data[] = {
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{
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.tx_dma_offset = 0x400,
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.rx_dma_offset = 0x400,
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.op_mode = DAVINCI_MCASP_IIS_MODE,
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.num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
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.tdm_slots = 2,
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.serial_dir = dm646x_iis_serializer_direction,
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.asp_chan_q = EVENTQ_0,
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},
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{
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.tx_dma_offset = 0x400,
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.rx_dma_offset = 0,
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.op_mode = DAVINCI_MCASP_DIT_MODE,
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.num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
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.tdm_slots = 32,
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.serial_dir = dm646x_dit_serializer_direction,
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.asp_chan_q = EVENTQ_0,
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},
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};
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static struct i2c_client *cpld_client;
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static int cpld_video_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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cpld_client = client;
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return 0;
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}
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static int cpld_video_remove(struct i2c_client *client)
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{
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cpld_client = NULL;
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return 0;
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}
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static const struct i2c_device_id cpld_video_id[] = {
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{ "cpld_video", 0 },
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{ }
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};
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static struct i2c_driver cpld_video_driver = {
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.driver = {
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.name = "cpld_video",
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},
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.probe = cpld_video_probe,
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.remove = cpld_video_remove,
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.id_table = cpld_video_id,
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};
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static void evm_init_cpld(void)
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{
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i2c_add_driver(&cpld_video_driver);
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}
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static struct i2c_board_info __initdata i2c_info[] = {
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{
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I2C_BOARD_INFO("24c256", 0x50),
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.platform_data = &eeprom_info,
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},
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{
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I2C_BOARD_INFO("pcf8574a", 0x38),
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.platform_data = &pcf_data,
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},
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{
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I2C_BOARD_INFO("cpld_reg0", 0x3a),
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},
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{
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I2C_BOARD_INFO("tlv320aic33", 0x18),
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},
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{
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I2C_BOARD_INFO("cpld_video", 0x3b),
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},
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{
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I2C_BOARD_INFO("cdce949", 0x6c),
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},
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};
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static struct davinci_i2c_platform_data i2c_pdata = {
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.bus_freq = 100 /* kHz */,
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.bus_delay = 0 /* usec */,
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};
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#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
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#define VCH2CLK_SYSCLK8 (BIT(9))
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#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
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#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
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#define VCH3CLK_SYSCLK8 (BIT(13))
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#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
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#define VIDCH2CLK (BIT(10))
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#define VIDCH3CLK (BIT(11))
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#define VIDCH1CLK (BIT(4))
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#define TVP7002_INPUT (BIT(4))
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#define TVP5147_INPUT (~BIT(4))
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#define VPIF_INPUT_ONE_CHANNEL (BIT(5))
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#define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
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#define TVP5147_CH0 "tvp514x-0"
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#define TVP5147_CH1 "tvp514x-1"
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/* spin lock for updating above registers */
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static spinlock_t vpif_reg_lock;
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static int set_vpif_clock(int mux_mode, int hd)
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{
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unsigned long flags;
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unsigned int value;
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int val = 0;
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int err = 0;
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if (!cpld_client)
|
|
return -ENXIO;
|
|
|
|
/* disable the clock */
|
|
spin_lock_irqsave(&vpif_reg_lock, flags);
|
|
value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
|
|
value |= (VIDCH3CLK | VIDCH2CLK);
|
|
__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
|
|
spin_unlock_irqrestore(&vpif_reg_lock, flags);
|
|
|
|
val = i2c_smbus_read_byte(cpld_client);
|
|
if (val < 0)
|
|
return val;
|
|
|
|
if (mux_mode == 1)
|
|
val &= ~0x40;
|
|
else
|
|
val |= 0x40;
|
|
|
|
err = i2c_smbus_write_byte(cpld_client, val);
|
|
if (err)
|
|
return err;
|
|
|
|
value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
|
|
value &= ~(VCH2CLK_MASK);
|
|
value &= ~(VCH3CLK_MASK);
|
|
|
|
if (hd >= 1)
|
|
value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
|
|
else
|
|
value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
|
|
|
|
__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
|
|
|
|
spin_lock_irqsave(&vpif_reg_lock, flags);
|
|
value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
|
|
/* enable the clock */
|
|
value &= ~(VIDCH3CLK | VIDCH2CLK);
|
|
__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
|
|
spin_unlock_irqrestore(&vpif_reg_lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct vpif_subdev_info dm646x_vpif_subdev[] = {
|
|
{
|
|
.name = "adv7343",
|
|
.board_info = {
|
|
I2C_BOARD_INFO("adv7343", 0x2a),
|
|
},
|
|
},
|
|
{
|
|
.name = "ths7303",
|
|
.board_info = {
|
|
I2C_BOARD_INFO("ths7303", 0x2c),
|
|
},
|
|
},
|
|
};
|
|
|
|
static const struct vpif_output dm6467_ch0_outputs[] = {
|
|
{
|
|
.output = {
|
|
.index = 0,
|
|
.name = "Composite",
|
|
.type = V4L2_OUTPUT_TYPE_ANALOG,
|
|
.capabilities = V4L2_OUT_CAP_STD,
|
|
.std = V4L2_STD_ALL,
|
|
},
|
|
.subdev_name = "adv7343",
|
|
.output_route = ADV7343_COMPOSITE_ID,
|
|
},
|
|
{
|
|
.output = {
|
|
.index = 1,
|
|
.name = "Component",
|
|
.type = V4L2_OUTPUT_TYPE_ANALOG,
|
|
.capabilities = V4L2_OUT_CAP_DV_TIMINGS,
|
|
},
|
|
.subdev_name = "adv7343",
|
|
.output_route = ADV7343_COMPONENT_ID,
|
|
},
|
|
{
|
|
.output = {
|
|
.index = 2,
|
|
.name = "S-Video",
|
|
.type = V4L2_OUTPUT_TYPE_ANALOG,
|
|
.capabilities = V4L2_OUT_CAP_STD,
|
|
.std = V4L2_STD_ALL,
|
|
},
|
|
.subdev_name = "adv7343",
|
|
.output_route = ADV7343_SVIDEO_ID,
|
|
},
|
|
};
|
|
|
|
static struct vpif_display_config dm646x_vpif_display_config = {
|
|
.set_clock = set_vpif_clock,
|
|
.subdevinfo = dm646x_vpif_subdev,
|
|
.subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
|
|
.chan_config[0] = {
|
|
.outputs = dm6467_ch0_outputs,
|
|
.output_count = ARRAY_SIZE(dm6467_ch0_outputs),
|
|
},
|
|
.card_name = "DM646x EVM",
|
|
};
|
|
|
|
/**
|
|
* setup_vpif_input_path()
|
|
* @channel: channel id (0 - CH0, 1 - CH1)
|
|
* @sub_dev_name: ptr sub device name
|
|
*
|
|
* This will set vpif input to capture data from tvp514x or
|
|
* tvp7002.
|
|
*/
|
|
static int setup_vpif_input_path(int channel, const char *sub_dev_name)
|
|
{
|
|
int err = 0;
|
|
int val;
|
|
|
|
/* for channel 1, we don't do anything */
|
|
if (channel != 0)
|
|
return 0;
|
|
|
|
if (!cpld_client)
|
|
return -ENXIO;
|
|
|
|
val = i2c_smbus_read_byte(cpld_client);
|
|
if (val < 0)
|
|
return val;
|
|
|
|
if (!strcmp(sub_dev_name, TVP5147_CH0) ||
|
|
!strcmp(sub_dev_name, TVP5147_CH1))
|
|
val &= TVP5147_INPUT;
|
|
else
|
|
val |= TVP7002_INPUT;
|
|
|
|
err = i2c_smbus_write_byte(cpld_client, val);
|
|
if (err)
|
|
return err;
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* setup_vpif_input_channel_mode()
|
|
* @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
|
|
*
|
|
* This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
|
|
*/
|
|
static int setup_vpif_input_channel_mode(int mux_mode)
|
|
{
|
|
unsigned long flags;
|
|
int err = 0;
|
|
int val;
|
|
u32 value;
|
|
|
|
if (!cpld_client)
|
|
return -ENXIO;
|
|
|
|
val = i2c_smbus_read_byte(cpld_client);
|
|
if (val < 0)
|
|
return val;
|
|
|
|
spin_lock_irqsave(&vpif_reg_lock, flags);
|
|
value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
|
|
if (mux_mode) {
|
|
val &= VPIF_INPUT_TWO_CHANNEL;
|
|
value |= VIDCH1CLK;
|
|
} else {
|
|
val |= VPIF_INPUT_ONE_CHANNEL;
|
|
value &= ~VIDCH1CLK;
|
|
}
|
|
__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
|
|
spin_unlock_irqrestore(&vpif_reg_lock, flags);
|
|
|
|
err = i2c_smbus_write_byte(cpld_client, val);
|
|
if (err)
|
|
return err;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct tvp514x_platform_data tvp5146_pdata = {
|
|
.clk_polarity = 0,
|
|
.hs_polarity = 1,
|
|
.vs_polarity = 1
|
|
};
|
|
|
|
#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
|
|
|
|
static struct vpif_subdev_info vpif_capture_sdev_info[] = {
|
|
{
|
|
.name = TVP5147_CH0,
|
|
.board_info = {
|
|
I2C_BOARD_INFO("tvp5146", 0x5d),
|
|
.platform_data = &tvp5146_pdata,
|
|
},
|
|
},
|
|
{
|
|
.name = TVP5147_CH1,
|
|
.board_info = {
|
|
I2C_BOARD_INFO("tvp5146", 0x5c),
|
|
.platform_data = &tvp5146_pdata,
|
|
},
|
|
},
|
|
};
|
|
|
|
static const struct vpif_input dm6467_ch0_inputs[] = {
|
|
{
|
|
.input = {
|
|
.index = 0,
|
|
.name = "Composite",
|
|
.type = V4L2_INPUT_TYPE_CAMERA,
|
|
.capabilities = V4L2_IN_CAP_STD,
|
|
.std = TVP514X_STD_ALL,
|
|
},
|
|
.subdev_name = TVP5147_CH0,
|
|
.input_route = INPUT_CVBS_VI2B,
|
|
.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
|
|
},
|
|
};
|
|
|
|
static const struct vpif_input dm6467_ch1_inputs[] = {
|
|
{
|
|
.input = {
|
|
.index = 0,
|
|
.name = "S-Video",
|
|
.type = V4L2_INPUT_TYPE_CAMERA,
|
|
.capabilities = V4L2_IN_CAP_STD,
|
|
.std = TVP514X_STD_ALL,
|
|
},
|
|
.subdev_name = TVP5147_CH1,
|
|
.input_route = INPUT_SVIDEO_VI2C_VI1C,
|
|
.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
|
|
},
|
|
};
|
|
|
|
static struct vpif_capture_config dm646x_vpif_capture_cfg = {
|
|
.setup_input_path = setup_vpif_input_path,
|
|
.setup_input_channel_mode = setup_vpif_input_channel_mode,
|
|
.subdev_info = vpif_capture_sdev_info,
|
|
.subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
|
|
.chan_config[0] = {
|
|
.inputs = dm6467_ch0_inputs,
|
|
.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
|
|
.vpif_if = {
|
|
.if_type = VPIF_IF_BT656,
|
|
.hd_pol = 1,
|
|
.vd_pol = 1,
|
|
.fid_pol = 0,
|
|
},
|
|
},
|
|
.chan_config[1] = {
|
|
.inputs = dm6467_ch1_inputs,
|
|
.input_count = ARRAY_SIZE(dm6467_ch1_inputs),
|
|
.vpif_if = {
|
|
.if_type = VPIF_IF_BT656,
|
|
.hd_pol = 1,
|
|
.vd_pol = 1,
|
|
.fid_pol = 0,
|
|
},
|
|
},
|
|
};
|
|
|
|
static void __init evm_init_video(void)
|
|
{
|
|
spin_lock_init(&vpif_reg_lock);
|
|
|
|
dm646x_setup_vpif(&dm646x_vpif_display_config,
|
|
&dm646x_vpif_capture_cfg);
|
|
}
|
|
|
|
static void __init evm_init_i2c(void)
|
|
{
|
|
davinci_init_i2c(&i2c_pdata);
|
|
i2c_add_driver(&dm6467evm_cpld_driver);
|
|
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
|
|
evm_init_cpld();
|
|
evm_init_video();
|
|
}
|
|
|
|
#define CDCE949_XIN_RATE 27000000
|
|
|
|
/* CDCE949 support - "lpsc" field is overridden to work as clock number */
|
|
static struct clk cdce_clk_in = {
|
|
.name = "cdce_xin",
|
|
.rate = CDCE949_XIN_RATE,
|
|
};
|
|
|
|
static struct clk_lookup cdce_clks[] = {
|
|
CLK(NULL, "xin", &cdce_clk_in),
|
|
CLK(NULL, NULL, NULL),
|
|
};
|
|
|
|
static void __init cdce_clk_init(void)
|
|
{
|
|
struct clk_lookup *c;
|
|
struct clk *clk;
|
|
|
|
for (c = cdce_clks; c->clk; c++) {
|
|
clk = c->clk;
|
|
clkdev_add(c);
|
|
clk_register(clk);
|
|
}
|
|
}
|
|
|
|
#define DM6467T_EVM_REF_FREQ 33000000
|
|
|
|
static void __init davinci_map_io(void)
|
|
{
|
|
dm646x_init();
|
|
|
|
if (machine_is_davinci_dm6467tevm())
|
|
davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
|
|
|
|
cdce_clk_init();
|
|
}
|
|
|
|
static struct davinci_uart_config uart_config __initdata = {
|
|
.enabled_uarts = (1 << 0),
|
|
};
|
|
|
|
#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
|
|
/*
|
|
* The following EDMA channels/slots are not being used by drivers (for
|
|
* example: Timer, GPIO, UART events etc) on dm646x, hence they are being
|
|
* reserved for codecs on the DSP side.
|
|
*/
|
|
static const s16 dm646x_dma_rsv_chans[][2] = {
|
|
/* (offset, number) */
|
|
{ 0, 4},
|
|
{13, 3},
|
|
{24, 4},
|
|
{30, 2},
|
|
{54, 3},
|
|
{-1, -1}
|
|
};
|
|
|
|
static const s16 dm646x_dma_rsv_slots[][2] = {
|
|
/* (offset, number) */
|
|
{ 0, 4},
|
|
{13, 3},
|
|
{24, 4},
|
|
{30, 2},
|
|
{54, 3},
|
|
{128, 384},
|
|
{-1, -1}
|
|
};
|
|
|
|
static struct edma_rsv_info dm646x_edma_rsv[] = {
|
|
{
|
|
.rsv_chans = dm646x_dma_rsv_chans,
|
|
.rsv_slots = dm646x_dma_rsv_slots,
|
|
},
|
|
};
|
|
|
|
static __init void evm_init(void)
|
|
{
|
|
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
|
|
|
evm_init_i2c();
|
|
davinci_serial_init(&uart_config);
|
|
dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
|
|
dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
|
|
|
|
if (machine_is_davinci_dm6467tevm())
|
|
davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
|
|
|
|
platform_device_register(&davinci_nand_device);
|
|
|
|
dm646x_init_edma(dm646x_edma_rsv);
|
|
|
|
if (HAS_ATA)
|
|
davinci_init_ide();
|
|
|
|
soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
|
|
}
|
|
|
|
MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
|
|
.atag_offset = 0x100,
|
|
.map_io = davinci_map_io,
|
|
.init_irq = davinci_irq_init,
|
|
.init_time = davinci_timer_init,
|
|
.init_machine = evm_init,
|
|
.init_late = davinci_init_late,
|
|
.dma_zone_size = SZ_128M,
|
|
.restart = davinci_restart,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
|
|
.atag_offset = 0x100,
|
|
.map_io = davinci_map_io,
|
|
.init_irq = davinci_irq_init,
|
|
.init_time = davinci_timer_init,
|
|
.init_machine = evm_init,
|
|
.init_late = davinci_init_late,
|
|
.dma_zone_size = SZ_128M,
|
|
.restart = davinci_restart,
|
|
MACHINE_END
|
|
|