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33d5c01915
The Tegra114 is a quad cores SoC. Each core can be hotplugged including CPU0. The hotplug sequence can be controlled by setting event trigger in flow controller. Then the flow controller will take care all the power sequence that include CPU up and down. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
40 lines
1.3 KiB
Makefile
40 lines
1.3 KiB
Makefile
asflags-y += -march=armv7-a
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obj-y += common.o
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obj-y += io.o
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obj-y += irq.o
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obj-y += fuse.o
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obj-y += pmc.o
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obj-y += flowctrl.o
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obj-y += powergate.o
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obj-y += apbio.o
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obj-y += pm.o
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obj-y += reset.o
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obj-y += reset-handler.o
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obj-y += sleep.o
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obj-y += tegra.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20_speedo.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o
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ifeq ($(CONFIG_CPU_IDLE),y)
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o
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endif
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obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_speedo.o
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obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-tegra30.o
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ifeq ($(CONFIG_CPU_IDLE),y)
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obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o
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endif
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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obj-$(CONFIG_TEGRA_PCI) += pcie.o
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obj-$(CONFIG_ARCH_TEGRA_114_SOC) += tegra114_speedo.o
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obj-$(CONFIG_ARCH_TEGRA_114_SOC) += sleep-tegra30.o
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ifeq ($(CONFIG_CPU_IDLE),y)
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obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o
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endif
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-harmony-pcie.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-paz00.o
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