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3c75ce7cc3
'cpus' is a common property, and it is now defined in dtschema schemas, so drop the type references in the tree. Acked-by: Suzuki K Poulose <suzuki.poulse@arm.com> Acked-by: Bjorn Andersson <andersson@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20221111212857.4104308-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
84 lines
2 KiB
YAML
84 lines
2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2021 Linaro Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/thermal/qcom-lmh.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Limits Management Hardware(LMh)
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maintainers:
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- Thara Gopinath <thara.gopinath@linaro.org>
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description:
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Limits Management Hardware(LMh) is a hardware infrastructure on some
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Qualcomm SoCs that can enforce temperature and current limits as
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programmed by software for certain IPs like CPU.
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properties:
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compatible:
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enum:
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- qcom,sc8180x-lmh
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- qcom,sdm845-lmh
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- qcom,sm8150-lmh
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reg:
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items:
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- description: core registers
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interrupts:
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maxItems: 1
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'#interrupt-cells':
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const: 1
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interrupt-controller: true
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cpus:
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description:
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phandle of the first cpu in the LMh cluster
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maxItems: 1
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qcom,lmh-temp-arm-millicelsius:
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description:
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An integer expressing temperature threshold at which the LMh thermal
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FSM is engaged.
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qcom,lmh-temp-low-millicelsius:
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description:
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An integer expressing temperature threshold at which the state machine
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will attempt to remove frequency throttling.
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qcom,lmh-temp-high-millicelsius:
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description:
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An integer expressing temperature threshold at which the state machine
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will attempt to throttle the frequency.
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required:
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- compatible
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- reg
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- interrupts
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- '#interrupt-cells'
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- interrupt-controller
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- cpus
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- qcom,lmh-temp-arm-millicelsius
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- qcom,lmh-temp-low-millicelsius
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- qcom,lmh-temp-high-millicelsius
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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lmh@17d70800 {
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compatible = "qcom,sdm845-lmh";
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reg = <0x17d70800 0x400>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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cpus = <&CPU4>;
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qcom,lmh-temp-arm-millicelsius = <65000>;
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qcom,lmh-temp-low-millicelsius = <94500>;
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qcom,lmh-temp-high-millicelsius = <95000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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