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954c601005
Convert the Mediatek Universal Flash Storage (UFS) Controller to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220306111125.116455-8-krzysztof.kozlowski@canonical.com
67 lines
1.2 KiB
YAML
67 lines
1.2 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek Universal Flash Storage (UFS) Controller
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maintainers:
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- Stanley Chu <stanley.chu@mediatek.com>
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allOf:
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- $ref: ufs-common.yaml
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properties:
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compatible:
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enum:
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- mediatek,mt8183-ufshci
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- mediatek,mt8192-ufshci
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: ufs
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phys:
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maxItems: 1
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reg:
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maxItems: 1
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vcc-supply: true
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required:
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- compatible
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- clocks
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- clock-names
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- phys
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- reg
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- vcc-supply
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8183-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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ufs@ff3c0000 {
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compatible = "mediatek,mt8183-ufshci";
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reg = <0 0x11270000 0 0x2300>;
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
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phys = <&ufsphy>;
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clocks = <&infracfg_ao CLK_INFRA_UFS>;
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clock-names = "ufs";
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freq-table-hz = <0 0>;
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vcc-supply = <&mt_pmic_vemc_ldo_reg>;
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};
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};
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