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8c64175513
We'd like all architectures to convert to ARCH_ATOMIC, as once all
architectures are converted it will be possible to make significant
cleanups to the atomics headers, and this will make it much easier to
generically enable atomic functionality (e.g. debug logic in the
instrumented wrappers).
As a step towards that, this patch migrates sh to ARCH_ATOMIC. The
arch code provides arch_{atomic,atomic64,xchg,cmpxchg}*(), and common
code wraps these with optional instrumentation to provide the regular
functions.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rich Felker <dalias@libc.org>
Cc: Will Deacon <will@kernel.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20210525140232.53872-30-mark.rutland@arm.com
88 lines
2.1 KiB
C
88 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_SH_ATOMIC_LLSC_H
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#define __ASM_SH_ATOMIC_LLSC_H
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/*
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* SH-4A note:
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*
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* We basically get atomic_xxx_return() for free compared with
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* atomic_xxx(). movli.l/movco.l require r0 due to the instruction
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* encoding, so the retval is automatically set without having to
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* do any special work.
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*/
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/*
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* To get proper branch prediction for the main line, we must branch
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* forward to code at the end of this object's .text section, then
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* branch back to restart the operation.
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*/
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#define ATOMIC_OP(op) \
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static inline void arch_atomic_##op(int i, atomic_t *v) \
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{ \
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unsigned long tmp; \
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\
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__asm__ __volatile__ ( \
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"1: movli.l @%2, %0 ! atomic_" #op "\n" \
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" " #op " %1, %0 \n" \
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" movco.l %0, @%2 \n" \
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" bf 1b \n" \
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: "=&z" (tmp) \
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: "r" (i), "r" (&v->counter) \
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: "t"); \
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}
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#define ATOMIC_OP_RETURN(op) \
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static inline int arch_atomic_##op##_return(int i, atomic_t *v) \
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{ \
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unsigned long temp; \
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\
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__asm__ __volatile__ ( \
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"1: movli.l @%2, %0 ! atomic_" #op "_return \n" \
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" " #op " %1, %0 \n" \
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" movco.l %0, @%2 \n" \
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" bf 1b \n" \
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" synco \n" \
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: "=&z" (temp) \
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: "r" (i), "r" (&v->counter) \
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: "t"); \
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\
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return temp; \
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}
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#define ATOMIC_FETCH_OP(op) \
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static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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unsigned long res, temp; \
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\
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__asm__ __volatile__ ( \
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"1: movli.l @%3, %0 ! atomic_fetch_" #op " \n" \
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" mov %0, %1 \n" \
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" " #op " %2, %0 \n" \
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" movco.l %0, @%3 \n" \
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" bf 1b \n" \
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" synco \n" \
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: "=&z" (temp), "=&r" (res) \
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: "r" (i), "r" (&v->counter) \
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: "t"); \
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\
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return res; \
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}
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#undef ATOMIC_OPS
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#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#undef ATOMIC_OPS
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#undef ATOMIC_FETCH_OP
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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#endif /* __ASM_SH_ATOMIC_LLSC_H */
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