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a06173badf
Allwinner V3s SoC also features the dual route of the first USB PHY. Enable it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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allwinner | ||
amlogic | ||
broadcom | ||
hisilicon | ||
lantiq | ||
marvell | ||
mediatek | ||
motorola | ||
qualcomm | ||
ralink | ||
renesas | ||
rockchip | ||
samsung | ||
st | ||
tegra | ||
ti | ||
Kconfig | ||
Makefile | ||
phy-core.c | ||
phy-lpc18xx-usb-otg.c | ||
phy-pistachio-usb.c | ||
phy-xgene.c |