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![Jani Nikula](/assets/img/avatar_default.png)
Disentangle i915_drv.h from intel_drv.h, which gets included via i915_trace.h. This necessitates including i915_trace.h wherever it's needed. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ed82bf259d3b725a1a1a3c3e9d6fb5c08bc4d489.1565085691.git.jani.nikula@intel.com
372 lines
11 KiB
C
372 lines
11 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* DOC: atomic plane helpers
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*
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* The functions here are used by the atomic plane helper functions to
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* implement legacy plane updates (i.e., drm_plane->update_plane() and
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* drm_plane->disable_plane()). This allows plane updates to use the
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* atomic state infrastructure and perform plane updates as separate
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* prepare/check/commit/cleanup steps.
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*/
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_plane_helper.h>
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#include "i915_trace.h"
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#include "intel_atomic_plane.h"
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#include "intel_drv.h"
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#include "intel_pm.h"
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#include "intel_sprite.h"
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struct intel_plane *intel_plane_alloc(void)
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{
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struct intel_plane_state *plane_state;
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struct intel_plane *plane;
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plane = kzalloc(sizeof(*plane), GFP_KERNEL);
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if (!plane)
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return ERR_PTR(-ENOMEM);
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plane_state = kzalloc(sizeof(*plane_state), GFP_KERNEL);
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if (!plane_state) {
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kfree(plane);
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return ERR_PTR(-ENOMEM);
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}
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__drm_atomic_helper_plane_reset(&plane->base, &plane_state->base);
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plane_state->scaler_id = -1;
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return plane;
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}
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void intel_plane_free(struct intel_plane *plane)
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{
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intel_plane_destroy_state(&plane->base, plane->base.state);
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kfree(plane);
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}
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/**
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* intel_plane_duplicate_state - duplicate plane state
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* @plane: drm plane
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*
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* Allocates and returns a copy of the plane state (both common and
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* Intel-specific) for the specified plane.
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*
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* Returns: The newly allocated plane state, or NULL on failure.
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*/
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struct drm_plane_state *
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intel_plane_duplicate_state(struct drm_plane *plane)
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{
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struct drm_plane_state *state;
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struct intel_plane_state *intel_state;
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intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
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if (!intel_state)
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return NULL;
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state = &intel_state->base;
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__drm_atomic_helper_plane_duplicate_state(plane, state);
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intel_state->vma = NULL;
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intel_state->flags = 0;
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return state;
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}
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/**
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* intel_plane_destroy_state - destroy plane state
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* @plane: drm plane
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* @state: state object to destroy
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*
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* Destroys the plane state (both common and Intel-specific) for the
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* specified plane.
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*/
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void
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intel_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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WARN_ON(to_intel_plane_state(state)->vma);
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drm_atomic_helper_plane_destroy_state(plane, state);
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}
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unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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const struct drm_framebuffer *fb = plane_state->base.fb;
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unsigned int cpp;
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if (!plane_state->base.visible)
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return 0;
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cpp = fb->format->cpp[0];
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/*
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* Based on HSD#:1408715493
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* NV12 cpp == 4, P010 cpp == 8
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*
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* FIXME what is the logic behind this?
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*/
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if (fb->format->is_yuv && fb->format->num_planes > 1)
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cpp *= 4;
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return cpp * crtc_state->pixel_rate;
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}
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int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state,
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struct intel_crtc_state *new_crtc_state,
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const struct intel_plane_state *old_plane_state,
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struct intel_plane_state *new_plane_state)
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{
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struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
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int ret;
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new_crtc_state->active_planes &= ~BIT(plane->id);
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new_crtc_state->nv12_planes &= ~BIT(plane->id);
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new_crtc_state->c8_planes &= ~BIT(plane->id);
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new_crtc_state->data_rate[plane->id] = 0;
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new_plane_state->base.visible = false;
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if (!new_plane_state->base.crtc && !old_plane_state->base.crtc)
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return 0;
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ret = plane->check_plane(new_crtc_state, new_plane_state);
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if (ret)
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return ret;
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/* FIXME pre-g4x don't work like this */
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if (new_plane_state->base.visible)
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new_crtc_state->active_planes |= BIT(plane->id);
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if (new_plane_state->base.visible &&
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is_planar_yuv_format(new_plane_state->base.fb->format->format))
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new_crtc_state->nv12_planes |= BIT(plane->id);
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if (new_plane_state->base.visible &&
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new_plane_state->base.fb->format->format == DRM_FORMAT_C8)
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new_crtc_state->c8_planes |= BIT(plane->id);
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if (new_plane_state->base.visible || old_plane_state->base.visible)
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new_crtc_state->update_planes |= BIT(plane->id);
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new_crtc_state->data_rate[plane->id] =
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intel_plane_data_rate(new_crtc_state, new_plane_state);
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return intel_plane_atomic_calc_changes(old_crtc_state, new_crtc_state,
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old_plane_state, new_plane_state);
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}
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static struct intel_crtc *
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get_crtc_from_states(const struct intel_plane_state *old_plane_state,
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const struct intel_plane_state *new_plane_state)
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{
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if (new_plane_state->base.crtc)
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return to_intel_crtc(new_plane_state->base.crtc);
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if (old_plane_state->base.crtc)
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return to_intel_crtc(old_plane_state->base.crtc);
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return NULL;
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}
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static int intel_plane_atomic_check(struct drm_plane *_plane,
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struct drm_plane_state *_new_plane_state)
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{
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struct intel_plane *plane = to_intel_plane(_plane);
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struct intel_atomic_state *state =
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to_intel_atomic_state(_new_plane_state->state);
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struct intel_plane_state *new_plane_state =
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to_intel_plane_state(_new_plane_state);
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const struct intel_plane_state *old_plane_state =
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intel_atomic_get_old_plane_state(state, plane);
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struct intel_crtc *crtc =
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get_crtc_from_states(old_plane_state, new_plane_state);
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const struct intel_crtc_state *old_crtc_state;
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struct intel_crtc_state *new_crtc_state;
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new_plane_state->base.visible = false;
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if (!crtc)
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return 0;
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old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
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new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
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return intel_plane_atomic_check_with_state(old_crtc_state,
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new_crtc_state,
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old_plane_state,
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new_plane_state);
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}
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static struct intel_plane *
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skl_next_plane_to_commit(struct intel_atomic_state *state,
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struct intel_crtc *crtc,
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struct skl_ddb_entry entries_y[I915_MAX_PLANES],
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struct skl_ddb_entry entries_uv[I915_MAX_PLANES],
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unsigned int *update_mask)
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{
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struct intel_crtc_state *crtc_state =
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intel_atomic_get_new_crtc_state(state, crtc);
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struct intel_plane_state *plane_state;
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struct intel_plane *plane;
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int i;
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if (*update_mask == 0)
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return NULL;
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for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
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enum plane_id plane_id = plane->id;
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if (crtc->pipe != plane->pipe ||
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!(*update_mask & BIT(plane_id)))
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continue;
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if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id],
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entries_y,
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I915_MAX_PLANES, plane_id) ||
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skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id],
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entries_uv,
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I915_MAX_PLANES, plane_id))
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continue;
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*update_mask &= ~BIT(plane_id);
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entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id];
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entries_uv[plane_id] = crtc_state->wm.skl.plane_ddb_uv[plane_id];
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return plane;
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}
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/* should never happen */
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WARN_ON(1);
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return NULL;
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}
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void intel_update_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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trace_intel_update_plane(&plane->base, crtc);
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plane->update_plane(plane, crtc_state, plane_state);
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}
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void intel_update_slave(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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trace_intel_update_plane(&plane->base, crtc);
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plane->update_slave(plane, crtc_state, plane_state);
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}
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void intel_disable_plane(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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trace_intel_disable_plane(&plane->base, crtc);
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plane->disable_plane(plane, crtc_state);
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}
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void skl_update_planes_on_crtc(struct intel_atomic_state *state,
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struct intel_crtc *crtc)
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{
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struct intel_crtc_state *old_crtc_state =
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intel_atomic_get_old_crtc_state(state, crtc);
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struct intel_crtc_state *new_crtc_state =
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intel_atomic_get_new_crtc_state(state, crtc);
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struct skl_ddb_entry entries_y[I915_MAX_PLANES];
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struct skl_ddb_entry entries_uv[I915_MAX_PLANES];
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u32 update_mask = new_crtc_state->update_planes;
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struct intel_plane *plane;
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memcpy(entries_y, old_crtc_state->wm.skl.plane_ddb_y,
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sizeof(old_crtc_state->wm.skl.plane_ddb_y));
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memcpy(entries_uv, old_crtc_state->wm.skl.plane_ddb_uv,
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sizeof(old_crtc_state->wm.skl.plane_ddb_uv));
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while ((plane = skl_next_plane_to_commit(state, crtc,
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entries_y, entries_uv,
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&update_mask))) {
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struct intel_plane_state *new_plane_state =
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intel_atomic_get_new_plane_state(state, plane);
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if (new_plane_state->base.visible) {
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intel_update_plane(plane, new_crtc_state, new_plane_state);
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} else if (new_plane_state->slave) {
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struct intel_plane *master =
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new_plane_state->linked_plane;
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/*
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* We update the slave plane from this function because
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* programming it from the master plane's update_plane
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* callback runs into issues when the Y plane is
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* reassigned, disabled or used by a different plane.
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*
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* The slave plane is updated with the master plane's
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* plane_state.
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*/
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new_plane_state =
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intel_atomic_get_new_plane_state(state, master);
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intel_update_slave(plane, new_crtc_state, new_plane_state);
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} else {
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intel_disable_plane(plane, new_crtc_state);
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}
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}
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}
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void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
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struct intel_crtc *crtc)
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{
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struct intel_crtc_state *new_crtc_state =
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intel_atomic_get_new_crtc_state(state, crtc);
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u32 update_mask = new_crtc_state->update_planes;
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struct intel_plane_state *new_plane_state;
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struct intel_plane *plane;
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int i;
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for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {
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if (crtc->pipe != plane->pipe ||
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!(update_mask & BIT(plane->id)))
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continue;
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if (new_plane_state->base.visible)
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intel_update_plane(plane, new_crtc_state, new_plane_state);
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else
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intel_disable_plane(plane, new_crtc_state);
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}
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}
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const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
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.prepare_fb = intel_prepare_plane_fb,
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.cleanup_fb = intel_cleanup_plane_fb,
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.atomic_check = intel_plane_atomic_check,
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};
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