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synced 2024-08-23 01:10:04 +00:00
![Jani Nikula](/assets/img/avatar_default.png)
Add a new subdirectory for display code, and start off by moving modesetting output/encoder code. Judging by the include changes, this is a surprisingly clean operation. v2: - move intel_sdvo_regs.h too - use tabs for Makefile file lists and sort them Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190613084416.6794-2-jani.nikula@intel.com
588 lines
15 KiB
C
588 lines
15 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*
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*/
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_dp_dual_mode_helper.h>
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#include <drm/drm_edid.h>
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#include "intel_dp.h"
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#include "intel_drv.h"
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#include "intel_lspcon.h"
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/* LSPCON OUI Vendor ID(signatures) */
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#define LSPCON_VENDOR_PARADE_OUI 0x001CF8
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#define LSPCON_VENDOR_MCA_OUI 0x0060AD
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/* AUX addresses to write MCA AVI IF */
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#define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
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#define LSPCON_MCA_AVI_IF_CTRL 0x5DF
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#define LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
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#define LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
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/* AUX addresses to write Parade AVI IF */
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#define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
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#define LSPCON_PARADE_AVI_IF_CTRL 0x51E
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#define LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
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#define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
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static struct intel_dp *lspcon_to_intel_dp(struct intel_lspcon *lspcon)
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{
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struct intel_digital_port *dig_port =
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container_of(lspcon, struct intel_digital_port, lspcon);
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return &dig_port->dp;
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}
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static const char *lspcon_mode_name(enum drm_lspcon_mode mode)
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{
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switch (mode) {
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case DRM_LSPCON_MODE_PCON:
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return "PCON";
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case DRM_LSPCON_MODE_LS:
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return "LS";
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case DRM_LSPCON_MODE_INVALID:
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return "INVALID";
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default:
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MISSING_CASE(mode);
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return "INVALID";
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}
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}
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static bool lspcon_detect_vendor(struct intel_lspcon *lspcon)
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{
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struct intel_dp *dp = lspcon_to_intel_dp(lspcon);
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struct drm_dp_dpcd_ident *ident;
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u32 vendor_oui;
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if (drm_dp_read_desc(&dp->aux, &dp->desc, drm_dp_is_branch(dp->dpcd))) {
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DRM_ERROR("Can't read description\n");
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return false;
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}
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ident = &dp->desc.ident;
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vendor_oui = (ident->oui[0] << 16) | (ident->oui[1] << 8) |
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ident->oui[2];
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switch (vendor_oui) {
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case LSPCON_VENDOR_MCA_OUI:
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lspcon->vendor = LSPCON_VENDOR_MCA;
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DRM_DEBUG_KMS("Vendor: Mega Chips\n");
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break;
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case LSPCON_VENDOR_PARADE_OUI:
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lspcon->vendor = LSPCON_VENDOR_PARADE;
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DRM_DEBUG_KMS("Vendor: Parade Tech\n");
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break;
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default:
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DRM_ERROR("Invalid/Unknown vendor OUI\n");
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return false;
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}
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return true;
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}
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static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon *lspcon)
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{
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enum drm_lspcon_mode current_mode;
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struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
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if (drm_lspcon_get_mode(adapter, ¤t_mode)) {
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DRM_DEBUG_KMS("Error reading LSPCON mode\n");
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return DRM_LSPCON_MODE_INVALID;
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}
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return current_mode;
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}
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static enum drm_lspcon_mode lspcon_wait_mode(struct intel_lspcon *lspcon,
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enum drm_lspcon_mode mode)
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{
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enum drm_lspcon_mode current_mode;
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current_mode = lspcon_get_current_mode(lspcon);
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if (current_mode == mode)
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goto out;
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DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n",
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lspcon_mode_name(mode));
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wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 400);
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if (current_mode != mode)
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DRM_ERROR("LSPCON mode hasn't settled\n");
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out:
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DRM_DEBUG_KMS("Current LSPCON mode %s\n",
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lspcon_mode_name(current_mode));
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return current_mode;
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}
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static int lspcon_change_mode(struct intel_lspcon *lspcon,
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enum drm_lspcon_mode mode)
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{
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int err;
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enum drm_lspcon_mode current_mode;
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struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
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err = drm_lspcon_get_mode(adapter, ¤t_mode);
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if (err) {
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DRM_ERROR("Error reading LSPCON mode\n");
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return err;
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}
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if (current_mode == mode) {
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DRM_DEBUG_KMS("Current mode = desired LSPCON mode\n");
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return 0;
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}
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err = drm_lspcon_set_mode(adapter, mode);
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if (err < 0) {
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DRM_ERROR("LSPCON mode change failed\n");
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return err;
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}
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lspcon->mode = mode;
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DRM_DEBUG_KMS("LSPCON mode changed done\n");
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return 0;
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}
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static bool lspcon_wake_native_aux_ch(struct intel_lspcon *lspcon)
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{
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u8 rev;
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if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon)->aux, DP_DPCD_REV,
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&rev) != 1) {
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DRM_DEBUG_KMS("Native AUX CH down\n");
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return false;
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}
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DRM_DEBUG_KMS("Native AUX CH up, DPCD version: %d.%d\n",
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rev >> 4, rev & 0xf);
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return true;
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}
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void lspcon_ycbcr420_config(struct drm_connector *connector,
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struct intel_crtc_state *crtc_state)
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{
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const struct drm_display_info *info = &connector->display_info;
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->base.adjusted_mode;
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if (drm_mode_is_420_only(info, adjusted_mode) &&
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connector->ycbcr_420_allowed) {
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crtc_state->port_clock /= 2;
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crtc_state->output_format = INTEL_OUTPUT_FORMAT_YCBCR444;
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crtc_state->lspcon_downsampling = true;
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}
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}
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static bool lspcon_probe(struct intel_lspcon *lspcon)
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{
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int retry;
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enum drm_dp_dual_mode_type adaptor_type;
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struct i2c_adapter *adapter = &lspcon_to_intel_dp(lspcon)->aux.ddc;
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enum drm_lspcon_mode expected_mode;
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expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
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DRM_LSPCON_MODE_PCON : DRM_LSPCON_MODE_LS;
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/* Lets probe the adaptor and check its type */
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for (retry = 0; retry < 6; retry++) {
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if (retry)
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usleep_range(500, 1000);
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adaptor_type = drm_dp_dual_mode_detect(adapter);
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if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
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break;
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}
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if (adaptor_type != DRM_DP_DUAL_MODE_LSPCON) {
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DRM_DEBUG_KMS("No LSPCON detected, found %s\n",
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drm_dp_get_dual_mode_type_name(adaptor_type));
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return false;
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}
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/* Yay ... got a LSPCON device */
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DRM_DEBUG_KMS("LSPCON detected\n");
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lspcon->mode = lspcon_wait_mode(lspcon, expected_mode);
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/*
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* In the SW state machine, lets Put LSPCON in PCON mode only.
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* In this way, it will work with both HDMI 1.4 sinks as well as HDMI
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* 2.0 sinks.
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*/
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if (lspcon->mode != DRM_LSPCON_MODE_PCON) {
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if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON) < 0) {
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DRM_ERROR("LSPCON mode change to PCON failed\n");
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return false;
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}
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}
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return true;
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}
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static void lspcon_resume_in_pcon_wa(struct intel_lspcon *lspcon)
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{
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struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
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struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
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unsigned long start = jiffies;
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while (1) {
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if (intel_digital_port_connected(&dig_port->base)) {
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DRM_DEBUG_KMS("LSPCON recovering in PCON mode after %u ms\n",
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jiffies_to_msecs(jiffies - start));
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return;
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}
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if (time_after(jiffies, start + msecs_to_jiffies(1000)))
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break;
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usleep_range(10000, 15000);
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}
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DRM_DEBUG_KMS("LSPCON DP descriptor mismatch after resume\n");
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}
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static bool lspcon_parade_fw_ready(struct drm_dp_aux *aux)
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{
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u8 avi_if_ctrl;
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u8 retry;
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ssize_t ret;
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/* Check if LSPCON FW is ready for data */
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for (retry = 0; retry < 5; retry++) {
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if (retry)
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usleep_range(200, 300);
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ret = drm_dp_dpcd_read(aux, LSPCON_PARADE_AVI_IF_CTRL,
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&avi_if_ctrl, 1);
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if (ret < 0) {
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DRM_ERROR("Failed to read AVI IF control\n");
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return false;
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}
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if ((avi_if_ctrl & LSPCON_PARADE_AVI_IF_KICKOFF) == 0)
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return true;
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}
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DRM_ERROR("Parade FW not ready to accept AVI IF\n");
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return false;
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}
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static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux *aux,
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u8 *avi_buf)
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{
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u8 avi_if_ctrl;
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u8 block_count = 0;
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u8 *data;
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u16 reg;
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ssize_t ret;
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while (block_count < 4) {
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if (!lspcon_parade_fw_ready(aux)) {
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DRM_DEBUG_KMS("LSPCON FW not ready, block %d\n",
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block_count);
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return false;
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}
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reg = LSPCON_PARADE_AVI_IF_WRITE_OFFSET;
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data = avi_buf + block_count * 8;
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ret = drm_dp_dpcd_write(aux, reg, data, 8);
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if (ret < 0) {
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DRM_ERROR("Failed to write AVI IF block %d\n",
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block_count);
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return false;
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}
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/*
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* Once a block of data is written, we have to inform the FW
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* about this by writing into avi infoframe control register:
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* - set the kickoff bit[7] to 1
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* - write the block no. to bits[1:0]
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*/
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reg = LSPCON_PARADE_AVI_IF_CTRL;
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avi_if_ctrl = LSPCON_PARADE_AVI_IF_KICKOFF | block_count;
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ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1);
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if (ret < 0) {
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DRM_ERROR("Failed to update (0x%x), block %d\n",
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reg, block_count);
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return false;
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}
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block_count++;
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}
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DRM_DEBUG_KMS("Wrote AVI IF blocks successfully\n");
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return true;
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}
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static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux *aux,
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const u8 *frame,
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ssize_t len)
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{
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u8 avi_if[LSPCON_PARADE_AVI_IF_DATA_SIZE] = {1, };
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/*
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* Parade's frames contains 32 bytes of data, divided
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* into 4 frames:
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* Token byte (first byte of first frame, must be non-zero)
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* HB0 to HB2 from AVI IF (3 bytes header)
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* PB0 to PB27 from AVI IF (28 bytes data)
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* So it should look like this
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* first block: | <token> <HB0-HB2> <DB0-DB3> |
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* next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
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*/
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if (len > LSPCON_PARADE_AVI_IF_DATA_SIZE - 1) {
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DRM_ERROR("Invalid length of infoframes\n");
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return false;
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}
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memcpy(&avi_if[1], frame, len);
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if (!_lspcon_parade_write_infoframe_blocks(aux, avi_if)) {
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DRM_DEBUG_KMS("Failed to write infoframe blocks\n");
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return false;
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}
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return true;
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}
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static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
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const u8 *buffer, ssize_t len)
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{
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int ret;
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u32 val = 0;
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u32 retry;
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u16 reg;
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const u8 *data = buffer;
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reg = LSPCON_MCA_AVI_IF_WRITE_OFFSET;
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while (val < len) {
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/* DPCD write for AVI IF can fail on a slow FW day, so retry */
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for (retry = 0; retry < 5; retry++) {
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ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1);
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if (ret == 1) {
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break;
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} else if (retry < 4) {
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mdelay(50);
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continue;
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} else {
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DRM_ERROR("DPCD write failed at:0x%x\n", reg);
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return false;
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}
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}
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val++; reg++; data++;
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}
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val = 0;
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reg = LSPCON_MCA_AVI_IF_CTRL;
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ret = drm_dp_dpcd_read(aux, reg, &val, 1);
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if (ret < 0) {
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DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
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return false;
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}
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/* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
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val &= ~LSPCON_MCA_AVI_IF_HANDLED;
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val |= LSPCON_MCA_AVI_IF_KICKOFF;
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ret = drm_dp_dpcd_write(aux, reg, &val, 1);
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if (ret < 0) {
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DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
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return false;
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}
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val = 0;
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ret = drm_dp_dpcd_read(aux, reg, &val, 1);
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if (ret < 0) {
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DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
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return false;
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}
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if (val == LSPCON_MCA_AVI_IF_HANDLED)
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DRM_DEBUG_KMS("AVI IF handled by FW\n");
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return true;
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}
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void lspcon_write_infoframe(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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unsigned int type,
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const void *frame, ssize_t len)
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{
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bool ret;
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struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
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struct intel_lspcon *lspcon = enc_to_intel_lspcon(&encoder->base);
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/* LSPCON only needs AVI IF */
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if (type != HDMI_INFOFRAME_TYPE_AVI)
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return;
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if (lspcon->vendor == LSPCON_VENDOR_MCA)
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ret = _lspcon_write_avi_infoframe_mca(&intel_dp->aux,
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frame, len);
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else
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ret = _lspcon_write_avi_infoframe_parade(&intel_dp->aux,
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frame, len);
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if (!ret) {
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DRM_ERROR("Failed to write AVI infoframes\n");
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return;
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}
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DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
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}
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void lspcon_read_infoframe(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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unsigned int type,
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void *frame, ssize_t len)
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{
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/* FIXME implement this */
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}
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void lspcon_set_infoframes(struct intel_encoder *encoder,
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bool enable,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state)
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{
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ssize_t ret;
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union hdmi_infoframe frame;
|
|
u8 buf[VIDEO_DIP_DATA_SIZE];
|
|
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
|
|
struct intel_lspcon *lspcon = &dig_port->lspcon;
|
|
const struct drm_display_mode *adjusted_mode =
|
|
&crtc_state->base.adjusted_mode;
|
|
|
|
if (!lspcon->active) {
|
|
DRM_ERROR("Writing infoframes while LSPCON disabled ?\n");
|
|
return;
|
|
}
|
|
|
|
/* FIXME precompute infoframes */
|
|
|
|
ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
|
|
conn_state->connector,
|
|
adjusted_mode);
|
|
if (ret < 0) {
|
|
DRM_ERROR("couldn't fill AVI infoframe\n");
|
|
return;
|
|
}
|
|
|
|
if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {
|
|
if (crtc_state->lspcon_downsampling)
|
|
frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
|
|
else
|
|
frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
|
|
} else {
|
|
frame.avi.colorspace = HDMI_COLORSPACE_RGB;
|
|
}
|
|
|
|
drm_hdmi_avi_infoframe_quant_range(&frame.avi,
|
|
conn_state->connector,
|
|
adjusted_mode,
|
|
crtc_state->limited_color_range ?
|
|
HDMI_QUANTIZATION_RANGE_LIMITED :
|
|
HDMI_QUANTIZATION_RANGE_FULL);
|
|
|
|
ret = hdmi_infoframe_pack(&frame, buf, sizeof(buf));
|
|
if (ret < 0) {
|
|
DRM_ERROR("Failed to pack AVI IF\n");
|
|
return;
|
|
}
|
|
|
|
dig_port->write_infoframe(encoder, crtc_state, HDMI_INFOFRAME_TYPE_AVI,
|
|
buf, ret);
|
|
}
|
|
|
|
u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
|
|
const struct intel_crtc_state *pipe_config)
|
|
{
|
|
/* FIXME actually read this from the hw */
|
|
return enc_to_intel_lspcon(&encoder->base)->active;
|
|
}
|
|
|
|
void lspcon_resume(struct intel_lspcon *lspcon)
|
|
{
|
|
enum drm_lspcon_mode expected_mode;
|
|
|
|
if (lspcon_wake_native_aux_ch(lspcon)) {
|
|
expected_mode = DRM_LSPCON_MODE_PCON;
|
|
lspcon_resume_in_pcon_wa(lspcon);
|
|
} else {
|
|
expected_mode = DRM_LSPCON_MODE_LS;
|
|
}
|
|
|
|
if (lspcon_wait_mode(lspcon, expected_mode) == DRM_LSPCON_MODE_PCON)
|
|
return;
|
|
|
|
if (lspcon_change_mode(lspcon, DRM_LSPCON_MODE_PCON))
|
|
DRM_ERROR("LSPCON resume failed\n");
|
|
else
|
|
DRM_DEBUG_KMS("LSPCON resume success\n");
|
|
}
|
|
|
|
void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon)
|
|
{
|
|
lspcon_wait_mode(lspcon, DRM_LSPCON_MODE_PCON);
|
|
}
|
|
|
|
bool lspcon_init(struct intel_digital_port *intel_dig_port)
|
|
{
|
|
struct intel_dp *dp = &intel_dig_port->dp;
|
|
struct intel_lspcon *lspcon = &intel_dig_port->lspcon;
|
|
struct drm_device *dev = intel_dig_port->base.base.dev;
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
|
struct drm_connector *connector = &dp->attached_connector->base;
|
|
|
|
if (!HAS_LSPCON(dev_priv)) {
|
|
DRM_ERROR("LSPCON is not supported on this platform\n");
|
|
return false;
|
|
}
|
|
|
|
lspcon->active = false;
|
|
lspcon->mode = DRM_LSPCON_MODE_INVALID;
|
|
|
|
if (!lspcon_probe(lspcon)) {
|
|
DRM_ERROR("Failed to probe lspcon\n");
|
|
return false;
|
|
}
|
|
|
|
if (!intel_dp_read_dpcd(dp)) {
|
|
DRM_ERROR("LSPCON DPCD read failed\n");
|
|
return false;
|
|
}
|
|
|
|
if (!lspcon_detect_vendor(lspcon)) {
|
|
DRM_ERROR("LSPCON vendor detection failed\n");
|
|
return false;
|
|
}
|
|
|
|
connector->ycbcr_420_allowed = true;
|
|
lspcon->active = true;
|
|
DRM_DEBUG_KMS("Success: LSPCON init\n");
|
|
return true;
|
|
}
|