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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-27 03:10:12 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
This is a fairly quiet release in all sound area. Only a little bit of changes in the core side while most of changes are seen in the drivers. HD-audio: - A few new codec additions for Nvidia, Realtek and VIA - Intel Haswell audio support - Support for "phantom" jacks for consistent jack reporting - Major clean-ups in HDMI/DP driver codes - A workaround for inverted digital-mic pins with Realtek codecs - Removal of beep_mode=2 option ASoC: - Added the ability to add and remove DAPM paths dynamically, mostly for reparenting on clock changes - New machine drivers for Marvell Brownstone, ST-Ericsson Ux500 reference platform and ttc-dkp - New CPU drivers for Blackfin BF6xx SPORTs in I2S mode, Marvell MMP, Synopsis Designware I2S controllers, and SPEAr DMA and S/PDIF - New CODEC drivers for Dialog DA732x, ST STA529, ST-Ericsson AB8500, TI Isabelle and Wolfson Microelectronics WM5102 and WM5110 - DAPM fixes for the recent locking changes - Fix for _PRE and _POST widgets (which have been broken for a few releases now) - A couple of minor driver updates Misc - Conversion to new dev_pm_ops in platform and PCI drivers - LTC support and some fixes in PCXHR driver - A few fixes and PM support for ISA OPti9xx and WSS cards - Some TLV code cleanup - Move driver-specific headers from include/sound to local dirs -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iQIcBAABAgAGBQJQDmlZAAoJEGwxgFQ9KSmkbZgQAJ8PzD1qFu/P+ARCtzWiWaun EPPiZeM8U4FW7S8jMpMnO03Cd98zjafNv4I3JJkkhVpK3nnqehNuqkLhWjKz9mY9 d8nX1AlCohHlnnrdDDOmSpKHFPIkfoLZGBHMxWZF7OvYrvSSfb40Or8eC/zMcvxq ULcL3/rQtQh2ybZOGxBtESJhIvl1DZAkRoGKUb3+/yLrrz6ziAwXWq04yvINuZQm YxSxxe545Xz5wyCQS730yk7bH4+MbXR0ltaId4ZGlWrj6t1MYrUO67PywNqMf9iC HgdzdvfwGy+DCrX+eILc+macpzpdg5FQJi84WmcBP5CQKQ9lH9Jdqe8G14QVRS4t 9Zv8lzatfjAnRnz5PY43sFBunG+82VRXsZ51SW//9EpiNcHEdA6KmNZRMAtu/NYq c9zqMEPSDSrch/BI901JJBDRuJs0IEB81CEBsjLyauJFM0rUkUBOLZRAgeR2Noft GEK4gh22r0+I3dsMsKmO6jr6UWUbG44ZKoRV0zmg1QKdqfnT1T2PdXo+3MBa/uKO MpBFWnw/JOjQZo3+oZ8FOCqNNDtHcvju4kHbmI+DksvSHH0m/NsY8tqG6uhpwN5t BDQX3a8Z6I6AbuyLIWNgHC+gjYLPN/vu7UjdZ1O78ztB/qUkatfHvzW24ez1BOUJ 1fDDG1mkdVvnKRO06Sat =N0aj -----END PGP SIGNATURE----- Merge tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound update from Takashi Iwai: "This is a fairly quiet release in all sound area. Only a little bit of changes in the core side while most of changes are seen in the drivers. HD-audio: - A few new codec additions for Nvidia, Realtek and VIA - Intel Haswell audio support - Support for "phantom" jacks for consistent jack reporting - Major clean-ups in HDMI/DP driver codes - A workaround for inverted digital-mic pins with Realtek codecs - Removal of beep_mode=2 option ASoC: - Added the ability to add and remove DAPM paths dynamically, mostly for reparenting on clock changes - New machine drivers for Marvell Brownstone, ST-Ericsson Ux500 reference platform and ttc-dkp - New CPU drivers for Blackfin BF6xx SPORTs in I2S mode, Marvell MMP, Synopsis Designware I2S controllers, and SPEAr DMA and S/PDIF - New CODEC drivers for Dialog DA732x, ST STA529, ST-Ericsson AB8500, TI Isabelle and Wolfson Microelectronics WM5102 and WM5110 - DAPM fixes for the recent locking changes - Fix for _PRE and _POST widgets (which have been broken for a few releases now) - A couple of minor driver updates Misc - Conversion to new dev_pm_ops in platform and PCI drivers - LTC support and some fixes in PCXHR driver - A few fixes and PM support for ISA OPti9xx and WSS cards - Some TLV code cleanup - Move driver-specific headers from include/sound to local dirs" * tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (212 commits) ASoC: dapm: Fix _PRE and _POST events for DAPM performance improvements ALSA: hda - add dock support for Thinkpad X230 Tablet ALSA: hda - Turn on PIN_OUT from hdmi playback prepare. ASoC imx-audmux: add MX31_AUDMUX_PORT7_SSI_PINS_7 define ASoC: littlemill: Add userspace control of the WM1250 I/O ASoC: wm8994: Update micdet for irqdomain conversion ALSA: hda - make sure alc268 does not OOPS on codec parse ALSA: hda - Add support for Realtek ALC282 ALSA: hda - Fix index number conflicts of phantom jacks ALSA: opti9xx: Fix section mismatch by PM support ALSA: snd-opti9xx: Implement suspend/resume ALSA: hda - Add new GPU codec ID to snd-hda ALSA: hda - Fix driver type of Haswell controller to AZX_DRIVER_SCH ALSA: hda - add Haswell HDMI codec id ALSA: hda - Add DeviceID for Haswell HDA ALSA: wss_lib: Fix resume on Yamaha OPL3-SAx ALSA: wss_lib: fix suspend/resume ALSA: es1938: replace TLV_DB_RANGE_HEAD with DECLARE_TLV_DB_RANGE ALSA: tlv: add DECLARE_TLV_DB_RANGE() ALSA: tlv: add DECLARE_TLV_CONTAINER() ...
492 lines
12 KiB
C
492 lines
12 KiB
C
/*
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* tegra20_i2s.c - Tegra20 I2S driver
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*
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* Author: Stephen Warren <swarren@nvidia.com>
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* Copyright (C) 2010,2012 - NVIDIA, Inc.
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*
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* Based on code copyright/by:
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*
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* Copyright (c) 2009-2010, NVIDIA Corporation.
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* Scott Peterson <speterson@nvidia.com>
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*
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* Copyright (C) 2010 Google, Inc.
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* Iliyan Malchev <malchev@google.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "tegra20_i2s.h"
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#define DRV_NAME "tegra20-i2s"
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static int tegra20_i2s_runtime_suspend(struct device *dev)
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{
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struct tegra20_i2s *i2s = dev_get_drvdata(dev);
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clk_disable_unprepare(i2s->clk_i2s);
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return 0;
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}
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static int tegra20_i2s_runtime_resume(struct device *dev)
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{
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struct tegra20_i2s *i2s = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(i2s->clk_i2s);
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if (ret) {
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dev_err(dev, "clk_enable failed: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int tegra20_i2s_set_fmt(struct snd_soc_dai *dai,
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unsigned int fmt)
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{
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struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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unsigned int mask, val;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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default:
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return -EINVAL;
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}
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mask = TEGRA20_I2S_CTRL_MASTER_ENABLE;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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val = TEGRA20_I2S_CTRL_MASTER_ENABLE;
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break;
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case SND_SOC_DAIFMT_CBM_CFM:
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break;
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default:
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return -EINVAL;
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}
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mask |= TEGRA20_I2S_CTRL_BIT_FORMAT_MASK |
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TEGRA20_I2S_CTRL_LRCK_MASK;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_A:
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val |= TEGRA20_I2S_CTRL_BIT_FORMAT_DSP;
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val |= TEGRA20_I2S_CTRL_LRCK_L_LOW;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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val |= TEGRA20_I2S_CTRL_BIT_FORMAT_DSP;
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val |= TEGRA20_I2S_CTRL_LRCK_R_LOW;
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break;
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case SND_SOC_DAIFMT_I2S:
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val |= TEGRA20_I2S_CTRL_BIT_FORMAT_I2S;
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val |= TEGRA20_I2S_CTRL_LRCK_L_LOW;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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val |= TEGRA20_I2S_CTRL_BIT_FORMAT_RJM;
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val |= TEGRA20_I2S_CTRL_LRCK_L_LOW;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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val |= TEGRA20_I2S_CTRL_BIT_FORMAT_LJM;
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val |= TEGRA20_I2S_CTRL_LRCK_L_LOW;
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break;
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default:
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return -EINVAL;
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}
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regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL, mask, val);
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return 0;
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}
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static int tegra20_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct device *dev = dai->dev;
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struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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unsigned int mask, val;
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int ret, sample_size, srate, i2sclock, bitcnt;
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mask = TEGRA20_I2S_CTRL_BIT_SIZE_MASK;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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val = TEGRA20_I2S_CTRL_BIT_SIZE_16;
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sample_size = 16;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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val = TEGRA20_I2S_CTRL_BIT_SIZE_24;
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sample_size = 24;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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val = TEGRA20_I2S_CTRL_BIT_SIZE_32;
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sample_size = 32;
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break;
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default:
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return -EINVAL;
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}
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mask |= TEGRA20_I2S_CTRL_FIFO_FORMAT_MASK;
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val |= TEGRA20_I2S_CTRL_FIFO_FORMAT_PACKED;
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regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL, mask, val);
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srate = params_rate(params);
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/* Final "* 2" required by Tegra hardware */
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i2sclock = srate * params_channels(params) * sample_size * 2;
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ret = clk_set_rate(i2s->clk_i2s, i2sclock);
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if (ret) {
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dev_err(dev, "Can't set I2S clock rate: %d\n", ret);
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return ret;
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}
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bitcnt = (i2sclock / (2 * srate)) - 1;
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if (bitcnt < 0 || bitcnt > TEGRA20_I2S_TIMING_CHANNEL_BIT_COUNT_MASK_US)
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return -EINVAL;
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val = bitcnt << TEGRA20_I2S_TIMING_CHANNEL_BIT_COUNT_SHIFT;
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if (i2sclock % (2 * srate))
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val |= TEGRA20_I2S_TIMING_NON_SYM_ENABLE;
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regmap_write(i2s->regmap, TEGRA20_I2S_TIMING, val);
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regmap_write(i2s->regmap, TEGRA20_I2S_FIFO_SCR,
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TEGRA20_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS |
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TEGRA20_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS);
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return 0;
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}
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static void tegra20_i2s_start_playback(struct tegra20_i2s *i2s)
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{
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regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
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TEGRA20_I2S_CTRL_FIFO1_ENABLE,
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TEGRA20_I2S_CTRL_FIFO1_ENABLE);
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}
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static void tegra20_i2s_stop_playback(struct tegra20_i2s *i2s)
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{
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regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
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TEGRA20_I2S_CTRL_FIFO1_ENABLE, 0);
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}
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static void tegra20_i2s_start_capture(struct tegra20_i2s *i2s)
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{
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regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
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TEGRA20_I2S_CTRL_FIFO2_ENABLE,
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TEGRA20_I2S_CTRL_FIFO2_ENABLE);
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}
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static void tegra20_i2s_stop_capture(struct tegra20_i2s *i2s)
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{
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regmap_update_bits(i2s->regmap, TEGRA20_I2S_CTRL,
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TEGRA20_I2S_CTRL_FIFO2_ENABLE, 0);
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}
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static int tegra20_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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case SNDRV_PCM_TRIGGER_RESUME:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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tegra20_i2s_start_playback(i2s);
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else
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tegra20_i2s_start_capture(i2s);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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tegra20_i2s_stop_playback(i2s);
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else
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tegra20_i2s_stop_capture(i2s);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int tegra20_i2s_probe(struct snd_soc_dai *dai)
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{
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struct tegra20_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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dai->capture_dma_data = &i2s->capture_dma_data;
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dai->playback_dma_data = &i2s->playback_dma_data;
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return 0;
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}
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static const struct snd_soc_dai_ops tegra20_i2s_dai_ops = {
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.set_fmt = tegra20_i2s_set_fmt,
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.hw_params = tegra20_i2s_hw_params,
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.trigger = tegra20_i2s_trigger,
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};
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static const struct snd_soc_dai_driver tegra20_i2s_dai_template = {
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.probe = tegra20_i2s_probe,
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.playback = {
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.stream_name = "Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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},
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.ops = &tegra20_i2s_dai_ops,
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.symmetric_rates = 1,
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};
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static bool tegra20_i2s_wr_rd_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case TEGRA20_I2S_CTRL:
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case TEGRA20_I2S_STATUS:
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case TEGRA20_I2S_TIMING:
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case TEGRA20_I2S_FIFO_SCR:
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case TEGRA20_I2S_PCM_CTRL:
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case TEGRA20_I2S_NW_CTRL:
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case TEGRA20_I2S_TDM_CTRL:
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case TEGRA20_I2S_TDM_TX_RX_CTRL:
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case TEGRA20_I2S_FIFO1:
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case TEGRA20_I2S_FIFO2:
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return true;
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default:
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return false;
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};
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}
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static bool tegra20_i2s_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case TEGRA20_I2S_STATUS:
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case TEGRA20_I2S_FIFO_SCR:
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case TEGRA20_I2S_FIFO1:
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case TEGRA20_I2S_FIFO2:
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return true;
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default:
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return false;
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};
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}
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static bool tegra20_i2s_precious_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case TEGRA20_I2S_FIFO1:
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case TEGRA20_I2S_FIFO2:
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return true;
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default:
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return false;
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};
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}
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static const struct regmap_config tegra20_i2s_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = TEGRA20_I2S_FIFO2,
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.writeable_reg = tegra20_i2s_wr_rd_reg,
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.readable_reg = tegra20_i2s_wr_rd_reg,
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.volatile_reg = tegra20_i2s_volatile_reg,
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.precious_reg = tegra20_i2s_precious_reg,
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.cache_type = REGCACHE_RBTREE,
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};
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static __devinit int tegra20_i2s_platform_probe(struct platform_device *pdev)
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{
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struct tegra20_i2s *i2s;
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struct resource *mem, *memregion, *dmareq;
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u32 of_dma[2];
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u32 dma_ch;
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void __iomem *regs;
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int ret;
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i2s = devm_kzalloc(&pdev->dev, sizeof(struct tegra20_i2s), GFP_KERNEL);
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if (!i2s) {
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dev_err(&pdev->dev, "Can't allocate tegra20_i2s\n");
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ret = -ENOMEM;
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goto err;
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}
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dev_set_drvdata(&pdev->dev, i2s);
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i2s->dai = tegra20_i2s_dai_template;
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i2s->dai.name = dev_name(&pdev->dev);
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i2s->clk_i2s = clk_get(&pdev->dev, NULL);
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if (IS_ERR(i2s->clk_i2s)) {
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dev_err(&pdev->dev, "Can't retrieve i2s clock\n");
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ret = PTR_ERR(i2s->clk_i2s);
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goto err;
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}
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem) {
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dev_err(&pdev->dev, "No memory resource\n");
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ret = -ENODEV;
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goto err_clk_put;
|
|
}
|
|
|
|
dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
|
|
if (!dmareq) {
|
|
if (of_property_read_u32_array(pdev->dev.of_node,
|
|
"nvidia,dma-request-selector",
|
|
of_dma, 2) < 0) {
|
|
dev_err(&pdev->dev, "No DMA resource\n");
|
|
ret = -ENODEV;
|
|
goto err_clk_put;
|
|
}
|
|
dma_ch = of_dma[1];
|
|
} else {
|
|
dma_ch = dmareq->start;
|
|
}
|
|
|
|
memregion = devm_request_mem_region(&pdev->dev, mem->start,
|
|
resource_size(mem), DRV_NAME);
|
|
if (!memregion) {
|
|
dev_err(&pdev->dev, "Memory region already claimed\n");
|
|
ret = -EBUSY;
|
|
goto err_clk_put;
|
|
}
|
|
|
|
regs = devm_ioremap(&pdev->dev, mem->start, resource_size(mem));
|
|
if (!regs) {
|
|
dev_err(&pdev->dev, "ioremap failed\n");
|
|
ret = -ENOMEM;
|
|
goto err_clk_put;
|
|
}
|
|
|
|
i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
|
|
&tegra20_i2s_regmap_config);
|
|
if (IS_ERR(i2s->regmap)) {
|
|
dev_err(&pdev->dev, "regmap init failed\n");
|
|
ret = PTR_ERR(i2s->regmap);
|
|
goto err_clk_put;
|
|
}
|
|
|
|
i2s->capture_dma_data.addr = mem->start + TEGRA20_I2S_FIFO2;
|
|
i2s->capture_dma_data.wrap = 4;
|
|
i2s->capture_dma_data.width = 32;
|
|
i2s->capture_dma_data.req_sel = dma_ch;
|
|
|
|
i2s->playback_dma_data.addr = mem->start + TEGRA20_I2S_FIFO1;
|
|
i2s->playback_dma_data.wrap = 4;
|
|
i2s->playback_dma_data.width = 32;
|
|
i2s->playback_dma_data.req_sel = dma_ch;
|
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
if (!pm_runtime_enabled(&pdev->dev)) {
|
|
ret = tegra20_i2s_runtime_resume(&pdev->dev);
|
|
if (ret)
|
|
goto err_pm_disable;
|
|
}
|
|
|
|
ret = snd_soc_register_dai(&pdev->dev, &i2s->dai);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Could not register DAI: %d\n", ret);
|
|
ret = -ENOMEM;
|
|
goto err_suspend;
|
|
}
|
|
|
|
ret = tegra_pcm_platform_register(&pdev->dev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
|
|
goto err_unregister_dai;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_unregister_dai:
|
|
snd_soc_unregister_dai(&pdev->dev);
|
|
err_suspend:
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
|
tegra20_i2s_runtime_suspend(&pdev->dev);
|
|
err_pm_disable:
|
|
pm_runtime_disable(&pdev->dev);
|
|
err_clk_put:
|
|
clk_put(i2s->clk_i2s);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit tegra20_i2s_platform_remove(struct platform_device *pdev)
|
|
{
|
|
struct tegra20_i2s *i2s = dev_get_drvdata(&pdev->dev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
|
tegra20_i2s_runtime_suspend(&pdev->dev);
|
|
|
|
tegra_pcm_platform_unregister(&pdev->dev);
|
|
snd_soc_unregister_dai(&pdev->dev);
|
|
|
|
clk_put(i2s->clk_i2s);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id tegra20_i2s_of_match[] __devinitconst = {
|
|
{ .compatible = "nvidia,tegra20-i2s", },
|
|
{},
|
|
};
|
|
|
|
static const struct dev_pm_ops tegra20_i2s_pm_ops __devinitconst = {
|
|
SET_RUNTIME_PM_OPS(tegra20_i2s_runtime_suspend,
|
|
tegra20_i2s_runtime_resume, NULL)
|
|
};
|
|
|
|
static struct platform_driver tegra20_i2s_driver = {
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = tegra20_i2s_of_match,
|
|
.pm = &tegra20_i2s_pm_ops,
|
|
},
|
|
.probe = tegra20_i2s_platform_probe,
|
|
.remove = __devexit_p(tegra20_i2s_platform_remove),
|
|
};
|
|
module_platform_driver(tegra20_i2s_driver);
|
|
|
|
MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
|
|
MODULE_DESCRIPTION("Tegra20 I2S ASoC driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:" DRV_NAME);
|
|
MODULE_DEVICE_TABLE(of, tegra20_i2s_of_match);
|