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![Paolo Bonzini](/assets/img/avatar_default.png)
- Add support for chained PMU counters in guests - Improve SError handling - Handle Neoverse N1 erratum #1349291 - Allow side-channel mitigation status to be migrated - Standardise most AArch64 system register accesses to msr_s/mrs_s - Fix host MPIDR corruption on 32bit -----BEGIN PGP SIGNATURE----- iQJJBAABCgAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAl0kge4VHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDYyQP/3XY5tFcLKkp/h9rnGaCXwAxhNzn TyF/IZEFBKFTSoDMXKLLc8KllvoPQ7aUl03heYbuayYpyKR1+LCx7lDwu1MYyEf+ aSSuOKlbG//tLUEGp09pTRCgjs2mhhZYqOj5GF2mZ7xpovFVSNOPzTazbXDNQ7tw zUAs43YNg+bUMwj+SLWpBlizjrLr7T34utIr6daKJE/GSfmIrcYXhGbZqUh0zbO0 z5LNasebws8/pHyeGI7+/yoMIKaQ8foMgywTpsRpBsx6YI+AbOLjEmCk2IBOPcEK pm9KkSIBZEO2CSxZKl3NQiEow/Qd/lnz2xLMCSfh4XrYoI2Th4gNcsbJpiBDWP5a 0eZ5jSiexxKngIbM+to7jR3m0yc9RgcuzceJg3Uly7Ya0vb5RqKwOX4Ge4XP4VDT DzIVFdQjxDKdVIf3EvGp1cj4P7dRUU3xbZcbzyuRPEmT3vgjEnbxawmPLs3QMAl1 31Wd2wIsPB86kSxzSMel27Vs5VgMhgyHE26zN91R745CvhDXaDKydIWjGjdVMHsB GuX/h2kL+ohx+N/OpZPgwsVUAGLSOQFP3pE/EcGtqc2kkfqa+bx12DKcZ3zdmJvy +cu5ixU8q5thPH/pZob/C3hKUY/eLy02emS34RK0Jh2sZHbQgAOtMsiqUxNHEjUm 6TkpdWa5SRd7CtGV =yfCs -----END PGP SIGNATURE----- Merge tag 'kvm-arm-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm updates for 5.3 - Add support for chained PMU counters in guests - Improve SError handling - Handle Neoverse N1 erratum #1349291 - Allow side-channel mitigation status to be migrated - Standardise most AArch64 system register accesses to msr_s/mrs_s - Fix host MPIDR corruption on 32bit
240 lines
5.6 KiB
C
240 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* irqchip.c: Common API for in kernel interrupt controllers
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* Copyright (c) 2007, Intel Corporation.
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* Copyright 2010 Red Hat, Inc. and/or its affiliates.
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* Copyright (c) 2013, Alexander Graf <agraf@suse.de>
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*
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* This file is derived from virt/kvm/irq_comm.c.
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*
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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* Alexander Graf <agraf@suse.de>
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*/
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#include <linux/kvm_host.h>
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#include <linux/slab.h>
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#include <linux/srcu.h>
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#include <linux/export.h>
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#include <trace/events/kvm.h>
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#include "irq.h"
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int kvm_irq_map_gsi(struct kvm *kvm,
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struct kvm_kernel_irq_routing_entry *entries, int gsi)
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{
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struct kvm_irq_routing_table *irq_rt;
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struct kvm_kernel_irq_routing_entry *e;
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int n = 0;
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irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
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lockdep_is_held(&kvm->irq_lock));
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if (irq_rt && gsi < irq_rt->nr_rt_entries) {
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hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
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entries[n] = *e;
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++n;
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}
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}
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return n;
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}
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int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
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{
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struct kvm_irq_routing_table *irq_rt;
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irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
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return irq_rt->chip[irqchip][pin];
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}
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int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi)
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{
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struct kvm_kernel_irq_routing_entry route;
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if (!irqchip_in_kernel(kvm) || (msi->flags & ~KVM_MSI_VALID_DEVID))
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return -EINVAL;
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route.msi.address_lo = msi->address_lo;
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route.msi.address_hi = msi->address_hi;
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route.msi.data = msi->data;
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route.msi.flags = msi->flags;
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route.msi.devid = msi->devid;
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return kvm_set_msi(&route, kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 1, false);
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}
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/*
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* Return value:
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* < 0 Interrupt was ignored (masked or not delivered for other reasons)
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* = 0 Interrupt was coalesced (previous irq is still pending)
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* > 0 Number of CPUs interrupt was delivered to
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*/
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int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
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bool line_status)
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{
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struct kvm_kernel_irq_routing_entry irq_set[KVM_NR_IRQCHIPS];
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int ret = -1, i, idx;
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trace_kvm_set_irq(irq, level, irq_source_id);
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/* Not possible to detect if the guest uses the PIC or the
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* IOAPIC. So set the bit in both. The guest will ignore
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* writes to the unused one.
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*/
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idx = srcu_read_lock(&kvm->irq_srcu);
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i = kvm_irq_map_gsi(kvm, irq_set, irq);
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srcu_read_unlock(&kvm->irq_srcu, idx);
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while (i--) {
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int r;
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r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level,
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line_status);
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if (r < 0)
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continue;
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ret = r + ((ret < 0) ? 0 : ret);
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}
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return ret;
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}
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static void free_irq_routing_table(struct kvm_irq_routing_table *rt)
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{
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int i;
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if (!rt)
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return;
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for (i = 0; i < rt->nr_rt_entries; ++i) {
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struct kvm_kernel_irq_routing_entry *e;
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struct hlist_node *n;
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hlist_for_each_entry_safe(e, n, &rt->map[i], link) {
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hlist_del(&e->link);
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kfree(e);
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}
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}
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kfree(rt);
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}
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void kvm_free_irq_routing(struct kvm *kvm)
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{
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/* Called only during vm destruction. Nobody can use the pointer
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at this stage */
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struct kvm_irq_routing_table *rt = rcu_access_pointer(kvm->irq_routing);
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free_irq_routing_table(rt);
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}
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static int setup_routing_entry(struct kvm *kvm,
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struct kvm_irq_routing_table *rt,
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struct kvm_kernel_irq_routing_entry *e,
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const struct kvm_irq_routing_entry *ue)
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{
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struct kvm_kernel_irq_routing_entry *ei;
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int r;
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u32 gsi = array_index_nospec(ue->gsi, KVM_MAX_IRQ_ROUTES);
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/*
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* Do not allow GSI to be mapped to the same irqchip more than once.
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* Allow only one to one mapping between GSI and non-irqchip routing.
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*/
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hlist_for_each_entry(ei, &rt->map[gsi], link)
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if (ei->type != KVM_IRQ_ROUTING_IRQCHIP ||
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ue->type != KVM_IRQ_ROUTING_IRQCHIP ||
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ue->u.irqchip.irqchip == ei->irqchip.irqchip)
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return -EINVAL;
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e->gsi = gsi;
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e->type = ue->type;
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r = kvm_set_routing_entry(kvm, e, ue);
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if (r)
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return r;
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if (e->type == KVM_IRQ_ROUTING_IRQCHIP)
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rt->chip[e->irqchip.irqchip][e->irqchip.pin] = e->gsi;
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hlist_add_head(&e->link, &rt->map[e->gsi]);
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return 0;
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}
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void __attribute__((weak)) kvm_arch_irq_routing_update(struct kvm *kvm)
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{
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}
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bool __weak kvm_arch_can_set_irq_routing(struct kvm *kvm)
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{
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return true;
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}
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int kvm_set_irq_routing(struct kvm *kvm,
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const struct kvm_irq_routing_entry *ue,
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unsigned nr,
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unsigned flags)
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{
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struct kvm_irq_routing_table *new, *old;
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struct kvm_kernel_irq_routing_entry *e;
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u32 i, j, nr_rt_entries = 0;
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int r;
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for (i = 0; i < nr; ++i) {
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if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
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return -EINVAL;
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nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
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}
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nr_rt_entries += 1;
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new = kzalloc(struct_size(new, map, nr_rt_entries), GFP_KERNEL_ACCOUNT);
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if (!new)
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return -ENOMEM;
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new->nr_rt_entries = nr_rt_entries;
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for (i = 0; i < KVM_NR_IRQCHIPS; i++)
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for (j = 0; j < KVM_IRQCHIP_NUM_PINS; j++)
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new->chip[i][j] = -1;
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for (i = 0; i < nr; ++i) {
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r = -ENOMEM;
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e = kzalloc(sizeof(*e), GFP_KERNEL_ACCOUNT);
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if (!e)
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goto out;
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r = -EINVAL;
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switch (ue->type) {
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case KVM_IRQ_ROUTING_MSI:
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if (ue->flags & ~KVM_MSI_VALID_DEVID)
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goto free_entry;
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break;
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default:
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if (ue->flags)
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goto free_entry;
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break;
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}
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r = setup_routing_entry(kvm, new, e, ue);
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if (r)
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goto free_entry;
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++ue;
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}
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mutex_lock(&kvm->irq_lock);
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old = rcu_dereference_protected(kvm->irq_routing, 1);
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rcu_assign_pointer(kvm->irq_routing, new);
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kvm_irq_routing_update(kvm);
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kvm_arch_irq_routing_update(kvm);
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mutex_unlock(&kvm->irq_lock);
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kvm_arch_post_irq_routing_update(kvm);
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synchronize_srcu_expedited(&kvm->irq_srcu);
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new = old;
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r = 0;
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goto out;
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free_entry:
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kfree(e);
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out:
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free_irq_routing_table(new);
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return r;
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}
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