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14442a159c
Add support for generating VMX feature names in capflags.c and use the resulting x86_vmx_flags to print the VMX flags in /proc/cpuinfo. Don't print VMX flags if no bits are set in word 0, which holds Pin Controls. Pin Control's INTR and NMI exiting are fundamental pillars of VMX, if they are not supported then the CPU is broken, it does not actually support VMX, or the kernel wasn't built with support for the target CPU. Print the features in a dedicated "vmx flags" line to avoid polluting the common "flags" and to avoid having to prefix all flags with "vmx_", which results in horrendously long names. Keep synthetic VMX flags in cpufeatures to preserve /proc/cpuinfo's ABI for those flags. This means that "flags" and "vmx flags" will have duplicate entries for tpr_shadow (virtual_tpr), vnmi, ept, flexpriority, vpid and ept_ad, but caps the pollution of "flags" at those six VMX features. The vendor-specific code that populates the synthetic flags will be consolidated in a future patch to further minimize the lasting damage. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20191221044513.21680-12-sean.j.christopherson@intel.com
182 lines
4.5 KiB
C
182 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/smp.h>
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#include <linux/timex.h>
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#include <linux/string.h>
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#include <linux/seq_file.h>
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#include <linux/cpufreq.h>
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#include "cpu.h"
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#ifdef CONFIG_X86_VMX_FEATURE_NAMES
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extern const char * const x86_vmx_flags[NVMXINTS*32];
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#endif
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/*
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* Get CPU information for use by the procfs.
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*/
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static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
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unsigned int cpu)
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{
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#ifdef CONFIG_SMP
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seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
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seq_printf(m, "siblings\t: %d\n",
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cpumask_weight(topology_core_cpumask(cpu)));
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seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
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seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
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seq_printf(m, "apicid\t\t: %d\n", c->apicid);
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seq_printf(m, "initial apicid\t: %d\n", c->initial_apicid);
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#endif
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}
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#ifdef CONFIG_X86_32
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static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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{
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seq_printf(m,
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"fdiv_bug\t: %s\n"
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"f00f_bug\t: %s\n"
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"coma_bug\t: %s\n"
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"fpu\t\t: %s\n"
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"fpu_exception\t: %s\n"
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"cpuid level\t: %d\n"
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"wp\t\t: yes\n",
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boot_cpu_has_bug(X86_BUG_FDIV) ? "yes" : "no",
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boot_cpu_has_bug(X86_BUG_F00F) ? "yes" : "no",
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boot_cpu_has_bug(X86_BUG_COMA) ? "yes" : "no",
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boot_cpu_has(X86_FEATURE_FPU) ? "yes" : "no",
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boot_cpu_has(X86_FEATURE_FPU) ? "yes" : "no",
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c->cpuid_level);
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}
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#else
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static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
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{
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seq_printf(m,
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"fpu\t\t: yes\n"
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"fpu_exception\t: yes\n"
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"cpuid level\t: %d\n"
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"wp\t\t: yes\n",
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c->cpuid_level);
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}
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#endif
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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struct cpuinfo_x86 *c = v;
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unsigned int cpu;
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int i;
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cpu = c->cpu_index;
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seq_printf(m, "processor\t: %u\n"
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"vendor_id\t: %s\n"
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"cpu family\t: %d\n"
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"model\t\t: %u\n"
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"model name\t: %s\n",
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cpu,
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c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
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c->x86,
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c->x86_model,
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c->x86_model_id[0] ? c->x86_model_id : "unknown");
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if (c->x86_stepping || c->cpuid_level >= 0)
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seq_printf(m, "stepping\t: %d\n", c->x86_stepping);
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else
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seq_puts(m, "stepping\t: unknown\n");
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if (c->microcode)
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seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
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if (cpu_has(c, X86_FEATURE_TSC)) {
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unsigned int freq = aperfmperf_get_khz(cpu);
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if (!freq)
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freq = cpufreq_quick_get(cpu);
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if (!freq)
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freq = cpu_khz;
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seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
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freq / 1000, (freq % 1000));
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}
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/* Cache size */
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if (c->x86_cache_size)
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seq_printf(m, "cache size\t: %u KB\n", c->x86_cache_size);
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show_cpuinfo_core(m, c, cpu);
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show_cpuinfo_misc(m, c);
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seq_puts(m, "flags\t\t:");
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for (i = 0; i < 32*NCAPINTS; i++)
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if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
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seq_printf(m, " %s", x86_cap_flags[i]);
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#ifdef CONFIG_X86_VMX_FEATURE_NAMES
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if (cpu_has(c, X86_FEATURE_VMX) && c->vmx_capability[0]) {
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seq_puts(m, "\nvmx flags\t:");
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for (i = 0; i < 32*NVMXINTS; i++) {
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if (test_bit(i, (unsigned long *)c->vmx_capability) &&
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x86_vmx_flags[i] != NULL)
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seq_printf(m, " %s", x86_vmx_flags[i]);
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}
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}
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#endif
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seq_puts(m, "\nbugs\t\t:");
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for (i = 0; i < 32*NBUGINTS; i++) {
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unsigned int bug_bit = 32*NCAPINTS + i;
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if (cpu_has_bug(c, bug_bit) && x86_bug_flags[i])
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seq_printf(m, " %s", x86_bug_flags[i]);
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}
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seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
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c->loops_per_jiffy/(500000/HZ),
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(c->loops_per_jiffy/(5000/HZ)) % 100);
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#ifdef CONFIG_X86_64
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if (c->x86_tlbsize > 0)
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seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
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#endif
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seq_printf(m, "clflush size\t: %u\n", c->x86_clflush_size);
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seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
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seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
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c->x86_phys_bits, c->x86_virt_bits);
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seq_puts(m, "power management:");
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for (i = 0; i < 32; i++) {
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if (c->x86_power & (1 << i)) {
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if (i < ARRAY_SIZE(x86_power_flags) &&
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x86_power_flags[i])
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seq_printf(m, "%s%s",
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x86_power_flags[i][0] ? " " : "",
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x86_power_flags[i]);
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else
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seq_printf(m, " [%d]", i);
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}
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}
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seq_puts(m, "\n\n");
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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*pos = cpumask_next(*pos - 1, cpu_online_mask);
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if ((*pos) < nr_cpu_ids)
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return &cpu_data(*pos);
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return NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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(*pos)++;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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