mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 17:30:02 +00:00
![Shunli Wang](/assets/img/avatar_default.png)
Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
|
|
* Copyright (c) 2014 MediaTek Inc.
|
|
* Author: Shunli Wang <shunli.wang@mediatek.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <linux/clk-provider.h>
|
|
#include <linux/platform_device.h>
|
|
|
|
#include "clk-mtk.h"
|
|
#include "clk-gate.h"
|
|
|
|
#include <dt-bindings/clock/mt2701-clk.h>
|
|
|
|
static const struct mtk_gate_regs img_cg_regs = {
|
|
.set_ofs = 0x0004,
|
|
.clr_ofs = 0x0008,
|
|
.sta_ofs = 0x0000,
|
|
};
|
|
|
|
#define GATE_IMG(_id, _name, _parent, _shift) { \
|
|
.id = _id, \
|
|
.name = _name, \
|
|
.parent_name = _parent, \
|
|
.regs = &img_cg_regs, \
|
|
.shift = _shift, \
|
|
.ops = &mtk_clk_gate_ops_setclr, \
|
|
}
|
|
|
|
static const struct mtk_gate img_clks[] = {
|
|
GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0),
|
|
GATE_IMG(CLK_IMG_RESZ, "img_resz", "mm_sel", 1),
|
|
GATE_IMG(CLK_IMG_JPGDEC_SMI, "img_jpgdec_smi", "mm_sel", 5),
|
|
GATE_IMG(CLK_IMG_JPGDEC, "img_jpgdec", "mm_sel", 6),
|
|
GATE_IMG(CLK_IMG_VENC_LT, "img_venc_lt", "mm_sel", 8),
|
|
GATE_IMG(CLK_IMG_VENC, "img_venc", "mm_sel", 9),
|
|
};
|
|
|
|
static const struct of_device_id of_match_clk_mt2701_img[] = {
|
|
{ .compatible = "mediatek,mt2701-imgsys", },
|
|
{}
|
|
};
|
|
|
|
static int clk_mt2701_img_probe(struct platform_device *pdev)
|
|
{
|
|
struct clk_onecell_data *clk_data;
|
|
int r;
|
|
struct device_node *node = pdev->dev.of_node;
|
|
|
|
clk_data = mtk_alloc_clk_data(CLK_IMG_NR);
|
|
|
|
mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
|
|
clk_data);
|
|
|
|
r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
|
|
if (r)
|
|
dev_err(&pdev->dev,
|
|
"could not register clock provider: %s: %d\n",
|
|
pdev->name, r);
|
|
|
|
return r;
|
|
}
|
|
|
|
static struct platform_driver clk_mt2701_img_drv = {
|
|
.probe = clk_mt2701_img_probe,
|
|
.driver = {
|
|
.name = "clk-mt2701-img",
|
|
.of_match_table = of_match_clk_mt2701_img,
|
|
},
|
|
};
|
|
|
|
builtin_platform_driver(clk_mt2701_img_drv);
|