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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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0e74823429
Add a param to allow users of sdhci_pltfm to allocate private space in calls to sdhci_pltfm_init+sdhci_pltfm_register. This is implemented in the same way as sdhci does for its users. None of the users have been migrated yet and are passing in zero to retain their private allocation. - todo: migrate clients to using allocation this way - todo: remove priv variable once migration is complete Also removed unused variable in sdhci_pltfm_init fn Signed-off-by: Christian Daudt <csd@broadcom.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/*
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* Copyright 2010 MontaVista Software, LLC.
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*
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* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _DRIVERS_MMC_SDHCI_PLTFM_H
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#define _DRIVERS_MMC_SDHCI_PLTFM_H
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include "sdhci.h"
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struct sdhci_pltfm_data {
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const struct sdhci_ops *ops;
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unsigned int quirks;
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unsigned int quirks2;
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};
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struct sdhci_pltfm_host {
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struct clk *clk;
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void *priv; /* to handle quirks across io-accessor calls */
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/* migrate from sdhci_of_host */
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unsigned int clock;
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u16 xfer_mode_shadow;
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unsigned long private[0] ____cacheline_aligned;
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};
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#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
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/*
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* These accessors are designed for big endian hosts doing I/O to
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* little endian controllers incorporating a 32-bit hardware byte swapper.
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*/
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static inline u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
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{
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return in_be32(host->ioaddr + reg);
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}
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static inline u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
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{
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return in_be16(host->ioaddr + (reg ^ 0x2));
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}
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static inline u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
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{
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return in_8(host->ioaddr + (reg ^ 0x3));
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}
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static inline void sdhci_be32bs_writel(struct sdhci_host *host,
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u32 val, int reg)
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{
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out_be32(host->ioaddr + reg, val);
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}
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static inline void sdhci_be32bs_writew(struct sdhci_host *host,
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u16 val, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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int base = reg & ~0x3;
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int shift = (reg & 0x2) * 8;
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switch (reg) {
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case SDHCI_TRANSFER_MODE:
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/*
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* Postpone this write, we must do it together with a
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* command write that is down below.
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*/
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pltfm_host->xfer_mode_shadow = val;
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return;
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case SDHCI_COMMAND:
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sdhci_be32bs_writel(host,
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val << 16 | pltfm_host->xfer_mode_shadow,
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SDHCI_TRANSFER_MODE);
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return;
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}
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clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
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}
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static inline void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
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{
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int base = reg & ~0x3;
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int shift = (reg & 0x3) * 8;
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clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
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}
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#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
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extern void sdhci_get_of_property(struct platform_device *pdev);
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extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,
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const struct sdhci_pltfm_data *pdata,
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size_t priv_size);
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extern void sdhci_pltfm_free(struct platform_device *pdev);
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extern int sdhci_pltfm_register(struct platform_device *pdev,
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const struct sdhci_pltfm_data *pdata,
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size_t priv_size);
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extern int sdhci_pltfm_unregister(struct platform_device *pdev);
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extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
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static inline void *sdhci_pltfm_priv(struct sdhci_pltfm_host *host)
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{
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return (void *)host->private;
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}
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#ifdef CONFIG_PM
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extern const struct dev_pm_ops sdhci_pltfm_pmops;
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#define SDHCI_PLTFM_PMOPS (&sdhci_pltfm_pmops)
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#else
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#define SDHCI_PLTFM_PMOPS NULL
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#endif
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#endif /* _DRIVERS_MMC_SDHCI_PLTFM_H */
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