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4e50025129
Some really really weird switches just couldn't decide whether to use a normal or a tail tagger, so they just did both. This creates problems for DSA, because we only have the concept of an 'overhead' which can be applied to the headroom or to the tailroom of the skb (like for example during the central TX reallocation procedure), depending on the value of bool tail_tag, but not to both. We need to generalize DSA to cater for these odd switches by transforming the 'overhead / tail_tag' pair into 'needed_headroom / needed_tailroom'. The DSA master's MTU is increased to account for both. The flow dissector code is modified such that it only calls the DSA adjustment callback if the tagger has a non-zero header length. Taggers are trivially modified to declare either needed_headroom or needed_tailroom, based on the tail_tag value that they currently declare. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
112 lines
2.8 KiB
C
112 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel / Lantiq GSWIP V2.0 PMAC tag support
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*
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* Copyright (C) 2017 - 2018 Hauke Mehrtens <hauke@hauke-m.de>
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*/
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#include <linux/bitops.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <net/dsa.h>
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#include "dsa_priv.h"
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#define GSWIP_TX_HEADER_LEN 4
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/* special tag in TX path header */
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/* Byte 0 */
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#define GSWIP_TX_SLPID_SHIFT 0 /* source port ID */
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#define GSWIP_TX_SLPID_CPU 2
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#define GSWIP_TX_SLPID_APP1 3
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#define GSWIP_TX_SLPID_APP2 4
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#define GSWIP_TX_SLPID_APP3 5
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#define GSWIP_TX_SLPID_APP4 6
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#define GSWIP_TX_SLPID_APP5 7
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/* Byte 1 */
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#define GSWIP_TX_CRCGEN_DIS BIT(7)
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#define GSWIP_TX_DPID_SHIFT 0 /* destination group ID */
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#define GSWIP_TX_DPID_ELAN 0
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#define GSWIP_TX_DPID_EWAN 1
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#define GSWIP_TX_DPID_CPU 2
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#define GSWIP_TX_DPID_APP1 3
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#define GSWIP_TX_DPID_APP2 4
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#define GSWIP_TX_DPID_APP3 5
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#define GSWIP_TX_DPID_APP4 6
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#define GSWIP_TX_DPID_APP5 7
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/* Byte 2 */
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#define GSWIP_TX_PORT_MAP_EN BIT(7)
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#define GSWIP_TX_PORT_MAP_SEL BIT(6)
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#define GSWIP_TX_LRN_DIS BIT(5)
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#define GSWIP_TX_CLASS_EN BIT(4)
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#define GSWIP_TX_CLASS_SHIFT 0
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#define GSWIP_TX_CLASS_MASK GENMASK(3, 0)
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/* Byte 3 */
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#define GSWIP_TX_DPID_EN BIT(0)
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#define GSWIP_TX_PORT_MAP_SHIFT 1
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#define GSWIP_TX_PORT_MAP_MASK GENMASK(6, 1)
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#define GSWIP_RX_HEADER_LEN 8
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/* special tag in RX path header */
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/* Byte 7 */
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#define GSWIP_RX_SPPID_SHIFT 4
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#define GSWIP_RX_SPPID_MASK GENMASK(6, 4)
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static struct sk_buff *gswip_tag_xmit(struct sk_buff *skb,
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struct net_device *dev)
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{
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struct dsa_port *dp = dsa_slave_to_port(dev);
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u8 *gswip_tag;
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skb_push(skb, GSWIP_TX_HEADER_LEN);
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gswip_tag = skb->data;
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gswip_tag[0] = GSWIP_TX_SLPID_CPU;
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gswip_tag[1] = GSWIP_TX_DPID_ELAN;
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gswip_tag[2] = GSWIP_TX_PORT_MAP_EN | GSWIP_TX_PORT_MAP_SEL;
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gswip_tag[3] = BIT(dp->index + GSWIP_TX_PORT_MAP_SHIFT) & GSWIP_TX_PORT_MAP_MASK;
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gswip_tag[3] |= GSWIP_TX_DPID_EN;
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return skb;
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}
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static struct sk_buff *gswip_tag_rcv(struct sk_buff *skb,
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struct net_device *dev,
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struct packet_type *pt)
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{
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int port;
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u8 *gswip_tag;
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if (unlikely(!pskb_may_pull(skb, GSWIP_RX_HEADER_LEN)))
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return NULL;
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gswip_tag = skb->data - ETH_HLEN;
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/* Get source port information */
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port = (gswip_tag[7] & GSWIP_RX_SPPID_MASK) >> GSWIP_RX_SPPID_SHIFT;
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skb->dev = dsa_master_find_slave(dev, 0, port);
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if (!skb->dev)
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return NULL;
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/* remove GSWIP tag */
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skb_pull_rcsum(skb, GSWIP_RX_HEADER_LEN);
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return skb;
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}
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static const struct dsa_device_ops gswip_netdev_ops = {
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.name = "gswip",
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.proto = DSA_TAG_PROTO_GSWIP,
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.xmit = gswip_tag_xmit,
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.rcv = gswip_tag_rcv,
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.needed_headroom = GSWIP_RX_HEADER_LEN,
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};
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_GSWIP);
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module_dsa_tag_driver(gswip_netdev_ops);
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