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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
112 lines
2.5 KiB
C
112 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SDHCI support for CNS3xxx SoC
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*
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* Copyright 2008 Cavium Networks
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* Copyright 2010 MontaVista Software, LLC.
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*
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* Authors: Scott Shu
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* Anton Vorontsov <avorontsov@mvista.com>
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/mmc/host.h>
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#include <linux/module.h>
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#include "sdhci-pltfm.h"
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static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host)
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{
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return 150000000;
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}
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static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock)
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{
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struct device *dev = mmc_dev(host->mmc);
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int div = 1;
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u16 clk;
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unsigned long timeout;
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host->mmc->actual_clock = 0;
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sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
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if (clock == 0)
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return;
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while (host->max_clk / div > clock) {
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/*
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* On CNS3xxx divider grows linearly up to 4, and then
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* exponentially up to 256.
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*/
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if (div < 4)
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div += 1;
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else if (div < 256)
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div *= 2;
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else
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break;
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}
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dev_dbg(dev, "desired SD clock: %d, actual: %d\n",
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clock, host->max_clk / div);
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/* Divide by 3 is special. */
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if (div != 3)
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div >>= 1;
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clk = div << SDHCI_DIVIDER_SHIFT;
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clk |= SDHCI_CLOCK_INT_EN;
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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timeout = 20;
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while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
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& SDHCI_CLOCK_INT_STABLE)) {
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if (timeout == 0) {
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dev_warn(dev, "clock is unstable");
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break;
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}
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timeout--;
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mdelay(1);
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}
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clk |= SDHCI_CLOCK_CARD_EN;
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sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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}
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static const struct sdhci_ops sdhci_cns3xxx_ops = {
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.get_max_clock = sdhci_cns3xxx_get_max_clk,
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.set_clock = sdhci_cns3xxx_set_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
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.ops = &sdhci_cns3xxx_ops,
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.quirks = SDHCI_QUIRK_BROKEN_DMA |
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SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
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SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
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SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
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SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
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};
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static int sdhci_cns3xxx_probe(struct platform_device *pdev)
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{
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return sdhci_pltfm_register(pdev, &sdhci_cns3xxx_pdata, 0);
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}
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static struct platform_driver sdhci_cns3xxx_driver = {
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.driver = {
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.name = "sdhci-cns3xxx",
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.pm = &sdhci_pltfm_pmops,
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},
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.probe = sdhci_cns3xxx_probe,
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.remove = sdhci_pltfm_unregister,
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};
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module_platform_driver(sdhci_cns3xxx_driver);
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MODULE_DESCRIPTION("SDHCI driver for CNS3xxx");
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MODULE_AUTHOR("Scott Shu, "
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"Anton Vorontsov <avorontsov@mvista.com>");
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MODULE_LICENSE("GPL v2");
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