Anurag Kumar Vulisha cea0f76a48 dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY ... Add DT bindings for the Xilinx ZynqMP PHY. ZynqMP SoCs have a High Speed Processing System Gigabit Transceiver which provides PHY capabilities to USB, SATA, PCIE, Display Port and Ehernet SGMII controllers. Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200629120054.29338-2-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2020-06-29 18:48:00 +05:30
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arm	dt-bindings: arm: Adds CoreSight CTI hardware definitions	2020-03-21 11:32:19 +01:00
bus	dt-bindings: bus: ti-sysc: Add support for PRUSS SYSC type	2020-03-04 07:52:50 -08:00
clk	dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock	2020-01-20 09:34:37 +02:00
clock	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
display	media: dt-bindings: display: add sdtv-standards defines	2020-03-12 16:29:29 +01:00
dma	dt-bindings: dmaengine: Add X1830 bindings.	2019-12-23 13:12:49 +05:30
firmware/imx	dt-bindings: firmware: imx: Add more system controls and PM clock types	2020-05-13 16:19:39 +08:00
gce	dt-binding: gce: add gce header file for mt8183	2019-09-17 00:40:05 -05:00
gpio	pinctrl: add compatible for Amlogic Meson A1 pin controller	2019-11-04 16:31:34 +01:00
i2c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 498	2019-06-19 17:09:53 +02:00
iio	dt-bindings: iio/adc: Add AUX2 channel idx for JZ4770 SoC ADC	2019-09-08 13:23:44 +01:00
input	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	2019-05-30 11:26:41 -07:00
interconnect	interconnect: imx: Add platform driver for imx8mn	2020-04-28 20:03:02 +03:00
interrupt-controller	dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller	2020-01-20 19:10:03 +00:00
leds	leds: make functions easier to understand	2020-04-06 22:57:21 +02:00
mailbox	dt-bindings: mailbox: Add devicetree binding for Qcom IPCC	2020-05-30 18:10:27 -05:00
media	media: partial revert of "[media] tvp5150: add HW input connectors support"	2020-03-12 16:35:59 +01:00
memory	dt-bindings: memory: Add Tegra194 memory controller header	2020-01-09 19:10:27 +01:00
mfd	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mips	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mux
net	dt-bindings: net: dp83869: Add TI dp83869 phy	2019-11-14 17:42:43 -08:00
phy	dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY	2020-06-29 18:48:00 +05:30
pinctrl	This is the bulk of pin control changes for the v5.8	2020-06-07 16:13:43 -07:00
pmu	include: dt-bindings: add Performance Monitoring Unit for Exynos	2019-11-06 12:03:59 +09:00
power	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
pwm
regulator	regulator: da9062: refactor buck modes into header	2019-11-15 12:06:06 +00:00
reset	This time around we have 4 lines of diff in the core framework, removing a	2020-06-10 11:42:19 -07:00
reset-controller	dt-bindings: mediatek: mt2712: Add #reset-cells	2020-01-27 15:55:48 +01:00
soc	dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock	2020-02-17 10:09:19 +01:00
sound	ASoC: meson: g12a: add toacodec dt-binding documentation	2020-02-21 16:39:04 +00:00
spmi	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
thermal	thermal: exynos: Rename Samsung and Exynos to lowercase	2020-01-27 10:24:32 +01:00
usb