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![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
845 lines
20 KiB
C
845 lines
20 KiB
C
/*
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* SGI IOC3 master driver and IRQ demuxer
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*
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* Copyright (c) 2005 Stanislaw Skowronek <skylark@linux-mips.org>
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* Heavily based on similar work by:
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* Brent Casavant <bcasavan@sgi.com> - IOC4 master driver
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* Pat Gefre <pfg@sgi.com> - IOC3 serial port IRQ demuxer
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/ioc3.h>
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#include <linux/rwsem.h>
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#include <linux/slab.h>
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#define IOC3_PCI_SIZE 0x100000
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static LIST_HEAD(ioc3_devices);
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static int ioc3_counter;
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static DECLARE_RWSEM(ioc3_devices_rwsem);
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static struct ioc3_submodule *ioc3_submodules[IOC3_MAX_SUBMODULES];
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static struct ioc3_submodule *ioc3_ethernet;
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static DEFINE_RWLOCK(ioc3_submodules_lock);
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/* NIC probing code */
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#define GPCR_MLAN_EN 0x00200000 /* enable MCR to pin 8 */
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static inline unsigned mcr_pack(unsigned pulse, unsigned sample)
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{
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return (pulse << 10) | (sample << 2);
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}
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static int nic_wait(struct ioc3_driver_data *idd)
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{
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unsigned mcr;
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do {
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mcr = readl(&idd->vma->mcr);
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} while (!(mcr & 2));
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return mcr & 1;
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}
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static int nic_reset(struct ioc3_driver_data *idd)
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{
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int presence;
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unsigned long flags;
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local_irq_save(flags);
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writel(mcr_pack(500, 65), &idd->vma->mcr);
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presence = nic_wait(idd);
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local_irq_restore(flags);
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udelay(500);
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return presence;
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}
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static int nic_read_bit(struct ioc3_driver_data *idd)
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{
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int result;
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unsigned long flags;
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local_irq_save(flags);
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writel(mcr_pack(6, 13), &idd->vma->mcr);
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result = nic_wait(idd);
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local_irq_restore(flags);
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udelay(500);
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return result;
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}
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static void nic_write_bit(struct ioc3_driver_data *idd, int bit)
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{
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if (bit)
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writel(mcr_pack(6, 110), &idd->vma->mcr);
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else
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writel(mcr_pack(80, 30), &idd->vma->mcr);
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nic_wait(idd);
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}
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static unsigned nic_read_byte(struct ioc3_driver_data *idd)
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{
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unsigned result = 0;
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int i;
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for (i = 0; i < 8; i++)
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result = (result >> 1) | (nic_read_bit(idd) << 7);
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return result;
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}
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static void nic_write_byte(struct ioc3_driver_data *idd, int byte)
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{
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int i, bit;
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for (i = 8; i; i--) {
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bit = byte & 1;
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byte >>= 1;
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nic_write_bit(idd, bit);
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}
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}
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static unsigned long
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nic_find(struct ioc3_driver_data *idd, int *last, unsigned long addr)
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{
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int a, b, index, disc;
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nic_reset(idd);
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/* Search ROM. */
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nic_write_byte(idd, 0xF0);
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/* Algorithm from ``Book of iButton Standards''. */
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for (index = 0, disc = 0; index < 64; index++) {
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a = nic_read_bit(idd);
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b = nic_read_bit(idd);
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if (a && b) {
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printk(KERN_WARNING "IOC3 NIC search failed.\n");
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*last = 0;
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return 0;
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}
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if (!a && !b) {
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if (index == *last) {
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addr |= 1UL << index;
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} else if (index > *last) {
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addr &= ~(1UL << index);
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disc = index;
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} else if ((addr & (1UL << index)) == 0)
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disc = index;
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nic_write_bit(idd, (addr>>index)&1);
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continue;
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} else {
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if (a)
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addr |= 1UL << index;
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else
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addr &= ~(1UL << index);
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nic_write_bit(idd, a);
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continue;
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}
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}
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*last = disc;
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return addr;
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}
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static void nic_addr(struct ioc3_driver_data *idd, unsigned long addr)
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{
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int index;
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nic_reset(idd);
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nic_write_byte(idd, 0xF0);
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for (index = 0; index < 64; index++) {
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nic_read_bit(idd);
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nic_read_bit(idd);
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nic_write_bit(idd, (addr>>index)&1);
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}
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}
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static void crc16_byte(unsigned int *crc, unsigned char db)
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{
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int i;
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for(i=0;i<8;i++) {
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*crc <<= 1;
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if((db^(*crc>>16)) & 1)
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*crc ^= 0x8005;
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db >>= 1;
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}
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*crc &= 0xFFFF;
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}
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static unsigned int crc16_area(unsigned char *dbs, int size, unsigned int crc)
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{
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while(size--)
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crc16_byte(&crc, *(dbs++));
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return crc;
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}
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static void crc8_byte(unsigned int *crc, unsigned char db)
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{
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int i,f;
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for(i=0;i<8;i++) {
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f = (*crc ^ db) & 1;
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*crc >>= 1;
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db >>= 1;
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if(f)
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*crc ^= 0x8c;
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}
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*crc &= 0xff;
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}
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static unsigned int crc8_addr(unsigned long addr)
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{
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int i;
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unsigned int crc = 0x00;
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for(i=0;i<8;i++)
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crc8_byte(&crc, addr>>(i<<3));
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return crc;
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}
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static void
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read_redir_page(struct ioc3_driver_data *idd, unsigned long addr, int page,
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unsigned char *redir, unsigned char *data)
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{
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int loops = 16, i;
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while(redir[page] != 0xFF) {
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page = redir[page]^0xFF;
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loops--;
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if(loops<0) {
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printk(KERN_ERR "IOC3: NIC circular redirection\n");
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return;
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}
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}
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loops = 3;
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while(loops>0) {
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nic_addr(idd, addr);
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nic_write_byte(idd, 0xF0);
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nic_write_byte(idd, (page << 5) & 0xE0);
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nic_write_byte(idd, (page >> 3) & 0x1F);
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for(i=0;i<0x20;i++)
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data[i] = nic_read_byte(idd);
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if(crc16_area(data, 0x20, 0x0000) == 0x800d)
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return;
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loops--;
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}
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printk(KERN_ERR "IOC3: CRC error in data page\n");
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for(i=0;i<0x20;i++)
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data[i] = 0x00;
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}
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static void
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read_redir_map(struct ioc3_driver_data *idd, unsigned long addr,
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unsigned char *redir)
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{
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int i,j,loops = 3,crc_ok;
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unsigned int crc;
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while(loops>0) {
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crc_ok = 1;
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nic_addr(idd, addr);
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nic_write_byte(idd, 0xAA);
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nic_write_byte(idd, 0x00);
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nic_write_byte(idd, 0x01);
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for(i=0;i<64;i+=8) {
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for(j=0;j<8;j++)
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redir[i+j] = nic_read_byte(idd);
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crc = crc16_area(redir+i, 8, (i==0)?0x8707:0x0000);
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crc16_byte(&crc, nic_read_byte(idd));
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crc16_byte(&crc, nic_read_byte(idd));
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if(crc != 0x800d)
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crc_ok = 0;
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}
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if(crc_ok)
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return;
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loops--;
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}
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printk(KERN_ERR "IOC3: CRC error in redirection page\n");
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for(i=0;i<64;i++)
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redir[i] = 0xFF;
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}
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static void read_nic(struct ioc3_driver_data *idd, unsigned long addr)
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{
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unsigned char redir[64];
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unsigned char data[64],part[32];
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int i,j;
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/* read redirections */
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read_redir_map(idd, addr, redir);
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/* read data pages */
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read_redir_page(idd, addr, 0, redir, data);
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read_redir_page(idd, addr, 1, redir, data+32);
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/* assemble the part # */
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j=0;
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for(i=0;i<19;i++)
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if(data[i+11] != ' ')
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part[j++] = data[i+11];
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for(i=0;i<6;i++)
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if(data[i+32] != ' ')
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part[j++] = data[i+32];
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part[j] = 0;
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/* skip Octane power supplies */
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if(!strncmp(part, "060-0035-", 9))
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return;
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if(!strncmp(part, "060-0038-", 9))
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return;
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strcpy(idd->nic_part, part);
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/* assemble the serial # */
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j=0;
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for(i=0;i<10;i++)
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if(data[i+1] != ' ')
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idd->nic_serial[j++] = data[i+1];
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idd->nic_serial[j] = 0;
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}
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static void read_mac(struct ioc3_driver_data *idd, unsigned long addr)
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{
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int i, loops = 3;
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unsigned char data[13];
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while(loops>0) {
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nic_addr(idd, addr);
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nic_write_byte(idd, 0xF0);
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nic_write_byte(idd, 0x00);
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nic_write_byte(idd, 0x00);
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nic_read_byte(idd);
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for(i=0;i<13;i++)
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data[i] = nic_read_byte(idd);
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if(crc16_area(data, 13, 0x0000) == 0x800d) {
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for(i=10;i>4;i--)
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idd->nic_mac[10-i] = data[i];
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return;
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}
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loops--;
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}
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printk(KERN_ERR "IOC3: CRC error in MAC address\n");
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for(i=0;i<6;i++)
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idd->nic_mac[i] = 0x00;
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}
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static void probe_nic(struct ioc3_driver_data *idd)
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{
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int save = 0, loops = 3;
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unsigned long first, addr;
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writel(GPCR_MLAN_EN, &idd->vma->gpcr_s);
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while(loops>0) {
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idd->nic_part[0] = 0;
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idd->nic_serial[0] = 0;
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addr = first = nic_find(idd, &save, 0);
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if(!first)
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return;
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while(1) {
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if(crc8_addr(addr))
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break;
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else {
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switch(addr & 0xFF) {
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case 0x0B:
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read_nic(idd, addr);
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break;
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case 0x09:
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case 0x89:
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case 0x91:
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read_mac(idd, addr);
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break;
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}
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}
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addr = nic_find(idd, &save, addr);
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if(addr == first)
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return;
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}
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loops--;
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}
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printk(KERN_ERR "IOC3: CRC error in NIC address\n");
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}
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/* Interrupts */
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static void write_ireg(struct ioc3_driver_data *idd, uint32_t val, int which)
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{
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unsigned long flags;
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spin_lock_irqsave(&idd->ir_lock, flags);
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switch (which) {
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case IOC3_W_IES:
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writel(val, &idd->vma->sio_ies);
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break;
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case IOC3_W_IEC:
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writel(val, &idd->vma->sio_iec);
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break;
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}
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spin_unlock_irqrestore(&idd->ir_lock, flags);
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}
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static inline uint32_t get_pending_intrs(struct ioc3_driver_data *idd)
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{
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unsigned long flag;
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uint32_t intrs = 0;
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spin_lock_irqsave(&idd->ir_lock, flag);
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intrs = readl(&idd->vma->sio_ir);
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intrs &= readl(&idd->vma->sio_ies);
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spin_unlock_irqrestore(&idd->ir_lock, flag);
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return intrs;
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}
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static irqreturn_t ioc3_intr_io(int irq, void *arg)
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{
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unsigned long flags;
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struct ioc3_driver_data *idd = arg;
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int handled = 1, id;
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unsigned int pending;
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read_lock_irqsave(&ioc3_submodules_lock, flags);
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if(idd->dual_irq && readb(&idd->vma->eisr)) {
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/* send Ethernet IRQ to the driver */
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if(ioc3_ethernet && idd->active[ioc3_ethernet->id] &&
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ioc3_ethernet->intr) {
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handled = handled && !ioc3_ethernet->intr(ioc3_ethernet,
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idd, 0);
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}
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}
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pending = get_pending_intrs(idd); /* look at the IO IRQs */
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for(id=0;id<IOC3_MAX_SUBMODULES;id++) {
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if(idd->active[id] && ioc3_submodules[id]
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&& (pending & ioc3_submodules[id]->irq_mask)
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&& ioc3_submodules[id]->intr) {
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write_ireg(idd, ioc3_submodules[id]->irq_mask,
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IOC3_W_IEC);
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if(!ioc3_submodules[id]->intr(ioc3_submodules[id],
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idd, pending & ioc3_submodules[id]->irq_mask))
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pending &= ~ioc3_submodules[id]->irq_mask;
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if (ioc3_submodules[id]->reset_mask)
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write_ireg(idd, ioc3_submodules[id]->irq_mask,
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IOC3_W_IES);
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}
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}
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read_unlock_irqrestore(&ioc3_submodules_lock, flags);
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if(pending) {
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printk(KERN_WARNING
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"IOC3: Pending IRQs 0x%08x discarded and disabled\n",pending);
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write_ireg(idd, pending, IOC3_W_IEC);
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handled = 1;
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}
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return handled?IRQ_HANDLED:IRQ_NONE;
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}
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static irqreturn_t ioc3_intr_eth(int irq, void *arg)
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{
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unsigned long flags;
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struct ioc3_driver_data *idd = (struct ioc3_driver_data *)arg;
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int handled = 1;
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if(!idd->dual_irq)
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return IRQ_NONE;
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read_lock_irqsave(&ioc3_submodules_lock, flags);
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if(ioc3_ethernet && idd->active[ioc3_ethernet->id]
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&& ioc3_ethernet->intr)
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handled = handled && !ioc3_ethernet->intr(ioc3_ethernet, idd, 0);
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read_unlock_irqrestore(&ioc3_submodules_lock, flags);
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return handled?IRQ_HANDLED:IRQ_NONE;
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}
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|
|
void ioc3_enable(struct ioc3_submodule *is,
|
|
struct ioc3_driver_data *idd, unsigned int irqs)
|
|
{
|
|
write_ireg(idd, irqs & is->irq_mask, IOC3_W_IES);
|
|
}
|
|
|
|
void ioc3_ack(struct ioc3_submodule *is, struct ioc3_driver_data *idd,
|
|
unsigned int irqs)
|
|
{
|
|
writel(irqs & is->irq_mask, &idd->vma->sio_ir);
|
|
}
|
|
|
|
void ioc3_disable(struct ioc3_submodule *is,
|
|
struct ioc3_driver_data *idd, unsigned int irqs)
|
|
{
|
|
write_ireg(idd, irqs & is->irq_mask, IOC3_W_IEC);
|
|
}
|
|
|
|
void ioc3_gpcr_set(struct ioc3_driver_data *idd, unsigned int val)
|
|
{
|
|
unsigned long flags;
|
|
spin_lock_irqsave(&idd->gpio_lock, flags);
|
|
writel(val, &idd->vma->gpcr_s);
|
|
spin_unlock_irqrestore(&idd->gpio_lock, flags);
|
|
}
|
|
|
|
/* Keep it simple, stupid! */
|
|
static int find_slot(void **tab, int max)
|
|
{
|
|
int i;
|
|
for(i=0;i<max;i++)
|
|
if(!(tab[i]))
|
|
return i;
|
|
return -1;
|
|
}
|
|
|
|
/* Register an IOC3 submodule */
|
|
int ioc3_register_submodule(struct ioc3_submodule *is)
|
|
{
|
|
struct ioc3_driver_data *idd;
|
|
int alloc_id;
|
|
unsigned long flags;
|
|
|
|
write_lock_irqsave(&ioc3_submodules_lock, flags);
|
|
alloc_id = find_slot((void **)ioc3_submodules, IOC3_MAX_SUBMODULES);
|
|
if(alloc_id != -1) {
|
|
ioc3_submodules[alloc_id] = is;
|
|
if(is->ethernet) {
|
|
if(ioc3_ethernet==NULL)
|
|
ioc3_ethernet=is;
|
|
else
|
|
printk(KERN_WARNING
|
|
"IOC3 Ethernet module already registered!\n");
|
|
}
|
|
}
|
|
write_unlock_irqrestore(&ioc3_submodules_lock, flags);
|
|
|
|
if(alloc_id == -1) {
|
|
printk(KERN_WARNING "Increase IOC3_MAX_SUBMODULES!\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
is->id=alloc_id;
|
|
|
|
/* Initialize submodule for each IOC3 */
|
|
if (!is->probe)
|
|
return 0;
|
|
|
|
down_read(&ioc3_devices_rwsem);
|
|
list_for_each_entry(idd, &ioc3_devices, list) {
|
|
/* set to 1 for IRQs in probe */
|
|
idd->active[alloc_id] = 1;
|
|
idd->active[alloc_id] = !is->probe(is, idd);
|
|
}
|
|
up_read(&ioc3_devices_rwsem);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Unregister an IOC3 submodule */
|
|
void ioc3_unregister_submodule(struct ioc3_submodule *is)
|
|
{
|
|
struct ioc3_driver_data *idd;
|
|
unsigned long flags;
|
|
|
|
write_lock_irqsave(&ioc3_submodules_lock, flags);
|
|
if(ioc3_submodules[is->id]==is)
|
|
ioc3_submodules[is->id]=NULL;
|
|
else
|
|
printk(KERN_WARNING
|
|
"IOC3 submodule %s has wrong ID.\n",is->name);
|
|
if(ioc3_ethernet==is)
|
|
ioc3_ethernet = NULL;
|
|
write_unlock_irqrestore(&ioc3_submodules_lock, flags);
|
|
|
|
/* Remove submodule for each IOC3 */
|
|
down_read(&ioc3_devices_rwsem);
|
|
list_for_each_entry(idd, &ioc3_devices, list)
|
|
if(idd->active[is->id]) {
|
|
if(is->remove)
|
|
if(is->remove(is, idd))
|
|
printk(KERN_WARNING
|
|
"%s: IOC3 submodule %s remove failed "
|
|
"for pci_dev %s.\n",
|
|
__func__, module_name(is->owner),
|
|
pci_name(idd->pdev));
|
|
idd->active[is->id] = 0;
|
|
if(is->irq_mask)
|
|
write_ireg(idd, is->irq_mask, IOC3_W_IEC);
|
|
}
|
|
up_read(&ioc3_devices_rwsem);
|
|
}
|
|
|
|
/*********************
|
|
* Device management *
|
|
*********************/
|
|
|
|
static char * __devinitdata
|
|
ioc3_class_names[]={"unknown", "IP27 BaseIO", "IP30 system", "MENET 1/2/3",
|
|
"MENET 4", "CADduo", "Altix Serial"};
|
|
|
|
static int __devinit ioc3_class(struct ioc3_driver_data *idd)
|
|
{
|
|
int res = IOC3_CLASS_NONE;
|
|
/* NIC-based logic */
|
|
if(!strncmp(idd->nic_part, "030-0891-", 9))
|
|
res = IOC3_CLASS_BASE_IP30;
|
|
if(!strncmp(idd->nic_part, "030-1155-", 9))
|
|
res = IOC3_CLASS_CADDUO;
|
|
if(!strncmp(idd->nic_part, "030-1657-", 9))
|
|
res = IOC3_CLASS_SERIAL;
|
|
if(!strncmp(idd->nic_part, "030-1664-", 9))
|
|
res = IOC3_CLASS_SERIAL;
|
|
/* total random heuristics */
|
|
#ifdef CONFIG_SGI_IP27
|
|
if(!idd->nic_part[0])
|
|
res = IOC3_CLASS_BASE_IP27;
|
|
#endif
|
|
/* print educational message */
|
|
printk(KERN_INFO "IOC3 part: [%s], serial: [%s] => class %s\n",
|
|
idd->nic_part, idd->nic_serial, ioc3_class_names[res]);
|
|
return res;
|
|
}
|
|
/* Adds a new instance of an IOC3 card */
|
|
static int __devinit
|
|
ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
|
|
{
|
|
struct ioc3_driver_data *idd;
|
|
uint32_t pcmd;
|
|
int ret, id;
|
|
|
|
/* Enable IOC3 and take ownership of it */
|
|
if ((ret = pci_enable_device(pdev))) {
|
|
printk(KERN_WARNING
|
|
"%s: Failed to enable IOC3 device for pci_dev %s.\n",
|
|
__func__, pci_name(pdev));
|
|
goto out;
|
|
}
|
|
pci_set_master(pdev);
|
|
|
|
#ifdef USE_64BIT_DMA
|
|
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
if (!ret) {
|
|
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
if (ret < 0) {
|
|
printk(KERN_WARNING "%s: Unable to obtain 64 bit DMA "
|
|
"for consistent allocations\n",
|
|
__func__);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/* Set up per-IOC3 data */
|
|
idd = kzalloc(sizeof(struct ioc3_driver_data), GFP_KERNEL);
|
|
if (!idd) {
|
|
printk(KERN_WARNING
|
|
"%s: Failed to allocate IOC3 data for pci_dev %s.\n",
|
|
__func__, pci_name(pdev));
|
|
ret = -ENODEV;
|
|
goto out_idd;
|
|
}
|
|
spin_lock_init(&idd->ir_lock);
|
|
spin_lock_init(&idd->gpio_lock);
|
|
idd->pdev = pdev;
|
|
|
|
/* Map all IOC3 registers. These are shared between subdevices
|
|
* so the main IOC3 module manages them.
|
|
*/
|
|
idd->pma = pci_resource_start(pdev, 0);
|
|
if (!idd->pma) {
|
|
printk(KERN_WARNING
|
|
"%s: Unable to find IOC3 resource "
|
|
"for pci_dev %s.\n",
|
|
__func__, pci_name(pdev));
|
|
ret = -ENODEV;
|
|
goto out_pci;
|
|
}
|
|
if (!request_mem_region(idd->pma, IOC3_PCI_SIZE, "ioc3")) {
|
|
printk(KERN_WARNING
|
|
"%s: Unable to request IOC3 region "
|
|
"for pci_dev %s.\n",
|
|
__func__, pci_name(pdev));
|
|
ret = -ENODEV;
|
|
goto out_pci;
|
|
}
|
|
idd->vma = ioremap(idd->pma, IOC3_PCI_SIZE);
|
|
if (!idd->vma) {
|
|
printk(KERN_WARNING
|
|
"%s: Unable to remap IOC3 region "
|
|
"for pci_dev %s.\n",
|
|
__func__, pci_name(pdev));
|
|
ret = -ENODEV;
|
|
goto out_misc_region;
|
|
}
|
|
|
|
/* Track PCI-device specific data */
|
|
pci_set_drvdata(pdev, idd);
|
|
down_write(&ioc3_devices_rwsem);
|
|
list_add_tail(&idd->list, &ioc3_devices);
|
|
idd->id = ioc3_counter++;
|
|
up_write(&ioc3_devices_rwsem);
|
|
|
|
idd->gpdr_shadow = readl(&idd->vma->gpdr);
|
|
|
|
/* Read IOC3 NIC contents */
|
|
probe_nic(idd);
|
|
|
|
/* Detect IOC3 class */
|
|
idd->class = ioc3_class(idd);
|
|
|
|
/* Initialize IOC3 */
|
|
pci_read_config_dword(pdev, PCI_COMMAND, &pcmd);
|
|
pci_write_config_dword(pdev, PCI_COMMAND,
|
|
pcmd | PCI_COMMAND_MEMORY |
|
|
PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
|
|
PCI_SCR_DROP_MODE_EN);
|
|
|
|
write_ireg(idd, ~0, IOC3_W_IEC);
|
|
writel(~0, &idd->vma->sio_ir);
|
|
|
|
/* Set up IRQs */
|
|
if(idd->class == IOC3_CLASS_BASE_IP30
|
|
|| idd->class == IOC3_CLASS_BASE_IP27) {
|
|
writel(0, &idd->vma->eier);
|
|
writel(~0, &idd->vma->eisr);
|
|
|
|
idd->dual_irq = 1;
|
|
if (!request_irq(pdev->irq, ioc3_intr_eth, IRQF_SHARED,
|
|
"ioc3-eth", (void *)idd)) {
|
|
idd->irq_eth = pdev->irq;
|
|
} else {
|
|
printk(KERN_WARNING
|
|
"%s : request_irq fails for IRQ 0x%x\n ",
|
|
__func__, pdev->irq);
|
|
}
|
|
if (!request_irq(pdev->irq+2, ioc3_intr_io, IRQF_SHARED,
|
|
"ioc3-io", (void *)idd)) {
|
|
idd->irq_io = pdev->irq+2;
|
|
} else {
|
|
printk(KERN_WARNING
|
|
"%s : request_irq fails for IRQ 0x%x\n ",
|
|
__func__, pdev->irq+2);
|
|
}
|
|
} else {
|
|
if (!request_irq(pdev->irq, ioc3_intr_io, IRQF_SHARED,
|
|
"ioc3", (void *)idd)) {
|
|
idd->irq_io = pdev->irq;
|
|
} else {
|
|
printk(KERN_WARNING
|
|
"%s : request_irq fails for IRQ 0x%x\n ",
|
|
__func__, pdev->irq);
|
|
}
|
|
}
|
|
|
|
/* Add this IOC3 to all submodules */
|
|
for(id=0;id<IOC3_MAX_SUBMODULES;id++)
|
|
if(ioc3_submodules[id] && ioc3_submodules[id]->probe) {
|
|
idd->active[id] = 1;
|
|
idd->active[id] = !ioc3_submodules[id]->probe
|
|
(ioc3_submodules[id], idd);
|
|
}
|
|
|
|
printk(KERN_INFO "IOC3 Master Driver loaded for %s\n", pci_name(pdev));
|
|
|
|
return 0;
|
|
|
|
out_misc_region:
|
|
release_mem_region(idd->pma, IOC3_PCI_SIZE);
|
|
out_pci:
|
|
kfree(idd);
|
|
out_idd:
|
|
pci_disable_device(pdev);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
/* Removes a particular instance of an IOC3 card. */
|
|
static void __devexit ioc3_remove(struct pci_dev *pdev)
|
|
{
|
|
int id;
|
|
struct ioc3_driver_data *idd;
|
|
|
|
idd = pci_get_drvdata(pdev);
|
|
|
|
/* Remove this IOC3 from all submodules */
|
|
for(id=0;id<IOC3_MAX_SUBMODULES;id++)
|
|
if(idd->active[id]) {
|
|
if(ioc3_submodules[id] && ioc3_submodules[id]->remove)
|
|
if(ioc3_submodules[id]->remove(ioc3_submodules[id],
|
|
idd))
|
|
printk(KERN_WARNING
|
|
"%s: IOC3 submodule 0x%s remove failed "
|
|
"for pci_dev %s.\n",
|
|
__func__,
|
|
module_name(ioc3_submodules[id]->owner),
|
|
pci_name(pdev));
|
|
idd->active[id] = 0;
|
|
}
|
|
|
|
/* Clear and disable all IRQs */
|
|
write_ireg(idd, ~0, IOC3_W_IEC);
|
|
writel(~0, &idd->vma->sio_ir);
|
|
|
|
/* Release resources */
|
|
free_irq(idd->irq_io, (void *)idd);
|
|
if(idd->dual_irq)
|
|
free_irq(idd->irq_eth, (void *)idd);
|
|
iounmap(idd->vma);
|
|
release_mem_region(idd->pma, IOC3_PCI_SIZE);
|
|
|
|
/* Disable IOC3 and relinquish */
|
|
pci_disable_device(pdev);
|
|
|
|
/* Remove and free driver data */
|
|
down_write(&ioc3_devices_rwsem);
|
|
list_del(&idd->list);
|
|
up_write(&ioc3_devices_rwsem);
|
|
kfree(idd);
|
|
}
|
|
|
|
static struct pci_device_id ioc3_id_table[] = {
|
|
{PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID},
|
|
{0}
|
|
};
|
|
|
|
static struct pci_driver ioc3_driver = {
|
|
.name = "IOC3",
|
|
.id_table = ioc3_id_table,
|
|
.probe = ioc3_probe,
|
|
.remove = __devexit_p(ioc3_remove),
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, ioc3_id_table);
|
|
|
|
/*********************
|
|
* Module management *
|
|
*********************/
|
|
|
|
/* Module load */
|
|
static int __init ioc3_init(void)
|
|
{
|
|
if (ia64_platform_is("sn2"))
|
|
return pci_register_driver(&ioc3_driver);
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* Module unload */
|
|
static void __exit ioc3_exit(void)
|
|
{
|
|
pci_unregister_driver(&ioc3_driver);
|
|
}
|
|
|
|
module_init(ioc3_init);
|
|
module_exit(ioc3_exit);
|
|
|
|
MODULE_AUTHOR("Stanislaw Skowronek <skylark@linux-mips.org>");
|
|
MODULE_DESCRIPTION("PCI driver for SGI IOC3");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL_GPL(ioc3_register_submodule);
|
|
EXPORT_SYMBOL_GPL(ioc3_unregister_submodule);
|
|
EXPORT_SYMBOL_GPL(ioc3_ack);
|
|
EXPORT_SYMBOL_GPL(ioc3_gpcr_set);
|
|
EXPORT_SYMBOL_GPL(ioc3_disable);
|
|
EXPORT_SYMBOL_GPL(ioc3_enable);
|