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![Timur Tabi](/assets/img/avatar_default.png)
Improve the status messages that are displayed during some operations of the PowerPC watchdog timer driver. When the watchdog is enabled, the timeout is displayed as a number of seconds, instead of an obscure "period". The "period" is the position of a bit in a 64-bit timer register. The higher the value, the quicker the watchdog timeout occurs. Some people chose a high "period" value for the timer and get confused as to why the board resets within a few seconds. Messages displayed during open and close are now debug messages, so that they don't clutter the console by default. Finally, printk() is replaced with the pr_xxx() equivalent. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
299 lines
7.3 KiB
C
299 lines
7.3 KiB
C
/*
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* Watchdog timer for PowerPC Book-E systems
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*
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* Author: Matthew McClintock
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/smp.h>
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#include <linux/miscdevice.h>
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#include <linux/notifier.h>
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#include <linux/watchdog.h>
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#include <linux/uaccess.h>
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#include <asm/reg_booke.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/div64.h>
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/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
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* Also, the wdt_period sets the watchdog timer period timeout.
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* For E500 cpus the wdt_period sets which bit changing from 0->1 will
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* trigger a watchog timeout. This watchdog timeout will occur 3 times, the
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* first time nothing will happen, the second time a watchdog exception will
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* occur, and the final time the board will reset.
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*/
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u32 booke_wdt_enabled;
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u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
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#ifdef CONFIG_FSL_BOOKE
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#define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
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#define WDTP_MASK (WDTP(0x3f))
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#else
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#define WDTP(x) (TCR_WP(x))
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#define WDTP_MASK (TCR_WP_MASK)
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#endif
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static DEFINE_SPINLOCK(booke_wdt_lock);
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/* For the specified period, determine the number of seconds
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* corresponding to the reset time. There will be a watchdog
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* exception at approximately 3/5 of this time.
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*
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* The formula to calculate this is given by:
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* 2.5 * (2^(63-period+1)) / timebase_freq
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*
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* In order to simplify things, we assume that period is
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* at least 1. This will still result in a very long timeout.
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*/
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static unsigned long long period_to_sec(unsigned int period)
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{
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unsigned long long tmp = 1ULL << (64 - period);
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unsigned long tmp2 = ppc_tb_freq;
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/* tmp may be a very large number and we don't want to overflow,
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* so divide the timebase freq instead of multiplying tmp
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*/
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tmp2 = tmp2 / 5 * 2;
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do_div(tmp, tmp2);
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return tmp;
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}
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/*
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* This procedure will find the highest period which will give a timeout
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* greater than the one required. e.g. for a bus speed of 66666666 and
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* and a parameter of 2 secs, then this procedure will return a value of 38.
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*/
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static unsigned int sec_to_period(unsigned int secs)
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{
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unsigned int period;
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for (period = 63; period > 0; period--) {
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if (period_to_sec(period) >= secs)
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return period;
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}
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return 0;
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}
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static void __booke_wdt_set(void *data)
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{
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u32 val;
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val = mfspr(SPRN_TCR);
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val &= ~WDTP_MASK;
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val |= WDTP(booke_wdt_period);
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mtspr(SPRN_TCR, val);
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}
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static void booke_wdt_set(void)
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{
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on_each_cpu(__booke_wdt_set, NULL, 0);
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}
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static void __booke_wdt_ping(void *data)
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{
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mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
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}
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static void booke_wdt_ping(void)
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{
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on_each_cpu(__booke_wdt_ping, NULL, 0);
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}
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static void __booke_wdt_enable(void *data)
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{
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u32 val;
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/* clear status before enabling watchdog */
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__booke_wdt_ping(NULL);
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val = mfspr(SPRN_TCR);
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val &= ~WDTP_MASK;
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val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
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mtspr(SPRN_TCR, val);
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}
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/**
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* booke_wdt_disable - disable the watchdog on the given CPU
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*
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* This function is called on each CPU. It disables the watchdog on that CPU.
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*
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* TCR[WRC] cannot be changed once it has been set to non-zero, but we can
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* effectively disable the watchdog by setting its period to the maximum value.
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*/
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static void __booke_wdt_disable(void *data)
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{
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u32 val;
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val = mfspr(SPRN_TCR);
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val &= ~(TCR_WIE | WDTP_MASK);
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mtspr(SPRN_TCR, val);
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/* clear status to make sure nothing is pending */
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__booke_wdt_ping(NULL);
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}
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static ssize_t booke_wdt_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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booke_wdt_ping();
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return count;
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}
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static struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "PowerPC Book-E Watchdog",
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};
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static long booke_wdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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u32 tmp = 0;
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u32 __user *p = (u32 __user *)arg;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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if (copy_to_user((void *)arg, &ident, sizeof(ident)))
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return -EFAULT;
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case WDIOC_GETSTATUS:
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return put_user(0, p);
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case WDIOC_GETBOOTSTATUS:
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/* XXX: something is clearing TSR */
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tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
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/* returns CARDRESET if last reset was caused by the WDT */
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return (tmp ? WDIOF_CARDRESET : 0);
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case WDIOC_SETOPTIONS:
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if (get_user(tmp, p))
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return -EINVAL;
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if (tmp == WDIOS_ENABLECARD) {
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booke_wdt_ping();
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break;
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} else
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return -EINVAL;
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return 0;
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case WDIOC_KEEPALIVE:
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booke_wdt_ping();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(tmp, p))
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return -EFAULT;
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#ifdef CONFIG_FSL_BOOKE
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/* period of 1 gives the largest possible timeout */
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if (tmp > period_to_sec(1))
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return -EINVAL;
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booke_wdt_period = sec_to_period(tmp);
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#else
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booke_wdt_period = tmp;
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#endif
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booke_wdt_set();
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return 0;
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case WDIOC_GETTIMEOUT:
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return put_user(booke_wdt_period, p);
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default:
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return -ENOTTY;
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}
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return 0;
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}
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/* wdt_is_active stores wether or not the /dev/watchdog device is opened */
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static unsigned long wdt_is_active;
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static int booke_wdt_open(struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &wdt_is_active))
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return -EBUSY;
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spin_lock(&booke_wdt_lock);
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if (booke_wdt_enabled == 0) {
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booke_wdt_enabled = 1;
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on_each_cpu(__booke_wdt_enable, NULL, 0);
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pr_debug("booke_wdt: watchdog enabled (timeout = %llu sec)\n",
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period_to_sec(booke_wdt_period));
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}
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spin_unlock(&booke_wdt_lock);
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return nonseekable_open(inode, file);
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}
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static int booke_wdt_release(struct inode *inode, struct file *file)
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{
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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/* Normally, the watchdog is disabled when /dev/watchdog is closed, but
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* if CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the
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* watchdog should remain enabled. So we disable it only if
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* CONFIG_WATCHDOG_NOWAYOUT is not defined.
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*/
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on_each_cpu(__booke_wdt_disable, NULL, 0);
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booke_wdt_enabled = 0;
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pr_debug("booke_wdt: watchdog disabled\n");
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#endif
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clear_bit(0, &wdt_is_active);
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return 0;
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}
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static const struct file_operations booke_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = booke_wdt_write,
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.unlocked_ioctl = booke_wdt_ioctl,
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.open = booke_wdt_open,
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.release = booke_wdt_release,
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};
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static struct miscdevice booke_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &booke_wdt_fops,
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};
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static void __exit booke_wdt_exit(void)
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{
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misc_deregister(&booke_wdt_miscdev);
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}
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static int __init booke_wdt_init(void)
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{
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int ret = 0;
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pr_info("booke_wdt: powerpc book-e watchdog driver loaded\n");
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ident.firmware_version = cur_cpu_spec->pvr_value;
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ret = misc_register(&booke_wdt_miscdev);
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if (ret) {
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pr_err("booke_wdt: cannot register device (minor=%u, ret=%i)\n",
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WATCHDOG_MINOR, ret);
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return ret;
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}
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spin_lock(&booke_wdt_lock);
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if (booke_wdt_enabled == 1) {
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pr_info("booke_wdt: watchdog enabled (timeout = %llu sec)\n",
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period_to_sec(booke_wdt_period));
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on_each_cpu(__booke_wdt_enable, NULL, 0);
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}
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spin_unlock(&booke_wdt_lock);
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return ret;
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}
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module_init(booke_wdt_init);
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module_exit(booke_wdt_exit);
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MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
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MODULE_LICENSE("GPL");
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