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![Tejun Heo](/assets/img/avatar_default.png)
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
426 lines
9.5 KiB
C
426 lines
9.5 KiB
C
/*
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* IBM Automatic Server Restart driver.
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*
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* Copyright (c) 2005 Andrey Panin <pazke@donpac.ru>
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*
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* Based on driver written by Pete Reynolds.
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* Copyright (c) IBM Corporation, 1998-2004.
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*
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* This software may be used and distributed according to the terms
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* of the GNU Public License, incorporated herein by reference.
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*/
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#include <linux/fs.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/timer.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/dmi.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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enum {
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ASMTYPE_UNKNOWN,
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ASMTYPE_TOPAZ,
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ASMTYPE_JASPER,
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ASMTYPE_PEARL,
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ASMTYPE_JUNIPER,
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ASMTYPE_SPRUCE,
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};
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#define PFX "ibmasr: "
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#define TOPAZ_ASR_REG_OFFSET 4
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#define TOPAZ_ASR_TOGGLE 0x40
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#define TOPAZ_ASR_DISABLE 0x80
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/* PEARL ASR S/W REGISTER SUPERIO PORT ADDRESSES */
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#define PEARL_BASE 0xe04
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#define PEARL_WRITE 0xe06
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#define PEARL_READ 0xe07
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#define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
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#define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
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/* JASPER OFFSET FROM SIO BASE ADDR TO ASR S/W REGISTERS. */
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#define JASPER_ASR_REG_OFFSET 0x38
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#define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
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#define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
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#define JUNIPER_BASE_ADDRESS 0x54b /* Base address of Juniper ASR */
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#define JUNIPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1 enable = 0 */
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#define JUNIPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
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#define SPRUCE_BASE_ADDRESS 0x118e /* Base address of Spruce ASR */
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#define SPRUCE_ASR_DISABLE_MASK 0x01 /* bit 1: disable = 1 enable = 0 */
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#define SPRUCE_ASR_TOGGLE_MASK 0x02 /* bit 0: 0, then 1, then 0 */
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static int nowayout = WATCHDOG_NOWAYOUT;
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static unsigned long asr_is_open;
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static char asr_expect_close;
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static unsigned int asr_type, asr_base, asr_length;
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static unsigned int asr_read_addr, asr_write_addr;
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static unsigned char asr_toggle_mask, asr_disable_mask;
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static spinlock_t asr_lock;
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static void __asr_toggle(void)
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{
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unsigned char reg;
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reg = inb(asr_read_addr);
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outb(reg & ~asr_toggle_mask, asr_write_addr);
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reg = inb(asr_read_addr);
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outb(reg | asr_toggle_mask, asr_write_addr);
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reg = inb(asr_read_addr);
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outb(reg & ~asr_toggle_mask, asr_write_addr);
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reg = inb(asr_read_addr);
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}
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static void asr_toggle(void)
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{
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spin_lock(&asr_lock);
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__asr_toggle();
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spin_unlock(&asr_lock);
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}
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static void asr_enable(void)
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{
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unsigned char reg;
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spin_lock(&asr_lock);
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if (asr_type == ASMTYPE_TOPAZ) {
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/* asr_write_addr == asr_read_addr */
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reg = inb(asr_read_addr);
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outb(reg & ~(TOPAZ_ASR_TOGGLE | TOPAZ_ASR_DISABLE),
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asr_read_addr);
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} else {
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/*
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* First make sure the hardware timer is reset by toggling
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* ASR hardware timer line.
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*/
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__asr_toggle();
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reg = inb(asr_read_addr);
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outb(reg & ~asr_disable_mask, asr_write_addr);
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}
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reg = inb(asr_read_addr);
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spin_unlock(&asr_lock);
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}
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static void asr_disable(void)
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{
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unsigned char reg;
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spin_lock(&asr_lock);
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reg = inb(asr_read_addr);
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if (asr_type == ASMTYPE_TOPAZ)
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/* asr_write_addr == asr_read_addr */
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outb(reg | TOPAZ_ASR_TOGGLE | TOPAZ_ASR_DISABLE,
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asr_read_addr);
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else {
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outb(reg | asr_toggle_mask, asr_write_addr);
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reg = inb(asr_read_addr);
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outb(reg | asr_disable_mask, asr_write_addr);
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}
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reg = inb(asr_read_addr);
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spin_unlock(&asr_lock);
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}
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static int __init asr_get_base_address(void)
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{
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unsigned char low, high;
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const char *type = "";
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asr_length = 1;
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switch (asr_type) {
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case ASMTYPE_TOPAZ:
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/* SELECT SuperIO CHIP FOR QUERYING
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(WRITE 0x07 TO BOTH 0x2E and 0x2F) */
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outb(0x07, 0x2e);
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outb(0x07, 0x2f);
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/* SELECT AND READ THE HIGH-NIBBLE OF THE GPIO BASE ADDRESS */
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outb(0x60, 0x2e);
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high = inb(0x2f);
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/* SELECT AND READ THE LOW-NIBBLE OF THE GPIO BASE ADDRESS */
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outb(0x61, 0x2e);
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low = inb(0x2f);
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asr_base = (high << 16) | low;
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asr_read_addr = asr_write_addr =
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asr_base + TOPAZ_ASR_REG_OFFSET;
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asr_length = 5;
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break;
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case ASMTYPE_JASPER:
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type = "Jaspers ";
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#if 0
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u32 r;
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/* Suggested fix */
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pdev = pci_get_bus_and_slot(0, DEVFN(0x1f, 0));
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if (pdev == NULL)
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return -ENODEV;
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pci_read_config_dword(pdev, 0x58, &r);
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asr_base = r & 0xFFFE;
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pci_dev_put(pdev);
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#else
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/* FIXME: need to use pci_config_lock here,
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but it's not exported */
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/* spin_lock_irqsave(&pci_config_lock, flags);*/
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/* Select the SuperIO chip in the PCI I/O port register */
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outl(0x8000f858, 0xcf8);
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/* BUS 0, Slot 1F, fnc 0, offset 58 */
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/*
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* Read the base address for the SuperIO chip.
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* Only the lower 16 bits are valid, but the address is word
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* aligned so the last bit must be masked off.
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*/
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asr_base = inl(0xcfc) & 0xfffe;
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/* spin_unlock_irqrestore(&pci_config_lock, flags);*/
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#endif
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asr_read_addr = asr_write_addr =
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asr_base + JASPER_ASR_REG_OFFSET;
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asr_toggle_mask = JASPER_ASR_TOGGLE_MASK;
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asr_disable_mask = JASPER_ASR_DISABLE_MASK;
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asr_length = JASPER_ASR_REG_OFFSET + 1;
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break;
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case ASMTYPE_PEARL:
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type = "Pearls ";
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asr_base = PEARL_BASE;
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asr_read_addr = PEARL_READ;
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asr_write_addr = PEARL_WRITE;
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asr_toggle_mask = PEARL_ASR_TOGGLE_MASK;
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asr_disable_mask = PEARL_ASR_DISABLE_MASK;
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asr_length = 4;
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break;
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case ASMTYPE_JUNIPER:
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type = "Junipers ";
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asr_base = JUNIPER_BASE_ADDRESS;
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asr_read_addr = asr_write_addr = asr_base;
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asr_toggle_mask = JUNIPER_ASR_TOGGLE_MASK;
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asr_disable_mask = JUNIPER_ASR_DISABLE_MASK;
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break;
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case ASMTYPE_SPRUCE:
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type = "Spruce's ";
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asr_base = SPRUCE_BASE_ADDRESS;
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asr_read_addr = asr_write_addr = asr_base;
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asr_toggle_mask = SPRUCE_ASR_TOGGLE_MASK;
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asr_disable_mask = SPRUCE_ASR_DISABLE_MASK;
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break;
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}
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if (!request_region(asr_base, asr_length, "ibmasr")) {
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printk(KERN_ERR PFX "address %#x already in use\n",
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asr_base);
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return -EBUSY;
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}
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printk(KERN_INFO PFX "found %sASR @ addr %#x\n", type, asr_base);
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return 0;
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}
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static ssize_t asr_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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if (count) {
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if (!nowayout) {
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size_t i;
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/* In case it was set long ago */
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asr_expect_close = 0;
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for (i = 0; i != count; i++) {
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char c;
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if (get_user(c, buf + i))
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return -EFAULT;
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if (c == 'V')
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asr_expect_close = 42;
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}
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}
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asr_toggle();
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}
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return count;
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}
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static long asr_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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static const struct watchdog_info ident = {
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.options = WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.identity = "IBM ASR",
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};
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int heartbeat;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_SETOPTIONS:
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{
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int new_options, retval = -EINVAL;
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if (get_user(new_options, p))
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return -EFAULT;
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if (new_options & WDIOS_DISABLECARD) {
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asr_disable();
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retval = 0;
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}
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if (new_options & WDIOS_ENABLECARD) {
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asr_enable();
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asr_toggle();
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retval = 0;
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}
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return retval;
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}
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case WDIOC_KEEPALIVE:
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asr_toggle();
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return 0;
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/*
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* The hardware has a fixed timeout value, so no WDIOC_SETTIMEOUT
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* and WDIOC_GETTIMEOUT always returns 256.
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*/
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case WDIOC_GETTIMEOUT:
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heartbeat = 256;
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return put_user(heartbeat, p);
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default:
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return -ENOTTY;
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}
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}
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static int asr_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(0, &asr_is_open))
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return -EBUSY;
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asr_toggle();
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asr_enable();
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return nonseekable_open(inode, file);
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}
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static int asr_release(struct inode *inode, struct file *file)
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{
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if (asr_expect_close == 42)
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asr_disable();
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else {
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printk(KERN_CRIT PFX
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"unexpected close, not stopping watchdog!\n");
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asr_toggle();
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}
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clear_bit(0, &asr_is_open);
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asr_expect_close = 0;
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return 0;
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}
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static const struct file_operations asr_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = asr_write,
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.unlocked_ioctl = asr_ioctl,
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.open = asr_open,
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.release = asr_release,
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};
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static struct miscdevice asr_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &asr_fops,
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};
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struct ibmasr_id {
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const char *desc;
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int type;
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};
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static struct ibmasr_id __initdata ibmasr_id_table[] = {
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{ "IBM Automatic Server Restart - eserver xSeries 220", ASMTYPE_TOPAZ },
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{ "IBM Automatic Server Restart - Machine Type 8673", ASMTYPE_PEARL },
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{ "IBM Automatic Server Restart - Machine Type 8480", ASMTYPE_JASPER },
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{ "IBM Automatic Server Restart - Machine Type 8482", ASMTYPE_JUNIPER },
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{ "IBM Automatic Server Restart - Machine Type 8648", ASMTYPE_SPRUCE },
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{ NULL }
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};
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static int __init ibmasr_init(void)
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{
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struct ibmasr_id *id;
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int rc;
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for (id = ibmasr_id_table; id->desc; id++) {
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if (dmi_find_device(DMI_DEV_TYPE_OTHER, id->desc, NULL)) {
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asr_type = id->type;
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break;
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}
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}
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if (!asr_type)
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return -ENODEV;
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spin_lock_init(&asr_lock);
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rc = asr_get_base_address();
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if (rc)
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return rc;
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rc = misc_register(&asr_miscdev);
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if (rc < 0) {
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release_region(asr_base, asr_length);
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printk(KERN_ERR PFX "failed to register misc device\n");
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return rc;
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}
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return 0;
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}
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static void __exit ibmasr_exit(void)
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{
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if (!nowayout)
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asr_disable();
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misc_deregister(&asr_miscdev);
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release_region(asr_base, asr_length);
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}
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module_init(ibmasr_init);
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module_exit(ibmasr_exit);
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout,
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"Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_DESCRIPTION("IBM Automatic Server Restart driver");
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MODULE_AUTHOR("Andrey Panin");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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