linux-stable/arch
Thomas Gleixner 56f23b5f95 x86/ioapic: Unbreak check_timer()
commit 86a82ae0b5 upstream.

Several people reported in the kernel bugzilla that between v4.12 and v4.13
the magic which works around broken hardware and BIOSes to find the proper
timer interrupt delivery mode stopped working for some older affected
platforms which need to fall back to ExtINT delivery mode.

The reason is that the core code changed to keep track of the masked and
disabled state of an interrupt line more accurately to avoid the expensive
hardware operations.

That broke an assumption in i8259_make_irq() which invokes

     disable_irq_nosync();
     irq_set_chip_and_handler();
     enable_irq();

Up to v4.12 this worked because enable_irq() unconditionally unmasked the
interrupt line, but after the state tracking improvements this is not
longer the case because the IO/APIC uses lazy disabling. So the line state
is unmasked which means that enable_irq() does not call into the new irq
chip to unmask it.

In principle this is a shortcoming of the core code, but it's more than
unclear whether the core code should try to reset state. At least this
cannot be done unconditionally as that would break other existing use cases
where the chip type is changed, e.g. when changing the trigger type, but
the callers expect the state to be preserved.

As the way how check_timer() is switching the delivery modes is truly
unique, the obvious fix is to simply unmask the i8259 manually after
changing the mode to ExtINT delivery and switching the irq chip to the
legacy PIC.

Note, that the fixes tag is not really precise, but identifies the commit
which broke the assumptions in the IO/APIC and i8259 code and that's the
kernel version to which this needs to be backported.

Fixes: bf22ff45be ("genirq: Avoid unnecessary low level irq function calls")
Reported-by: p_c_chan@hotmail.com
Reported-by: ecm4@mail.com
Reported-by: perdigao1@yahoo.com
Reported-by: matzes@users.sourceforge.net
Reported-by: rvelascog@gmail.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: p_c_chan@hotmail.com
Tested-by: matzes@users.sourceforge.net
Cc: stable@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=197769
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-10-01 13:12:27 +02:00
..
alpha alpha: fix annotation of io{read,write}{16,32}be() 2020-08-26 10:29:57 +02:00
arc ARC: [plat-hsdk]: Switch ethernet phy-mode to rgmii-id 2020-09-23 10:46:27 +02:00
arm ARM: dts: vfxxx: Add syscon compatible with OCOTP 2020-09-23 10:46:31 +02:00
arm64 arm64: dts: ns2: Fixed QSPI compatible string 2020-09-23 10:46:26 +02:00
blackfin
c6x
cris
frv
h8300
hexagon hexagon: work around compiler crash 2020-01-17 19:45:55 +01:00
ia64
m32r
m68k m68k: q40: Fix info-leak in rtc_ioctl 2020-10-01 13:12:26 +02:00
metag
microblaze microblaze: Prevent the overflow of the start 2020-02-28 16:36:08 +01:00
mips MIPS: SNI: Fix spurious interrupts 2020-09-23 10:46:35 +02:00
mn10300
nios2 nios2: ksyms: Add missing symbol exports 2020-01-27 14:46:24 +01:00
openrisc openrisc: Fix issue with argument clobbering for clone/fork 2020-06-25 15:41:56 +02:00
parisc parisc: Implement __smp_store_release and __smp_load_acquire barriers 2020-08-21 09:48:16 +02:00
powerpc powerpc/dma: Fix dma_map_ops::get_required_mask 2020-09-23 10:46:37 +02:00
s390 s390: don't trace preemption in percpu macros 2020-09-09 19:03:07 +02:00
score
sh sh: landisk: Add missing initialization of sh_io_port_base 2020-08-21 09:48:23 +02:00
sparc fix a braino in "sparc32: fix register window handling in genregs32_[gs]et()" 2020-06-30 15:37:57 -04:00
tile
um um: Make GCOV depend on !KCOV 2019-12-05 15:37:49 +01:00
unicore32
x86 x86/ioapic: Unbreak check_timer() 2020-10-01 13:12:27 +02:00
xtensa block: Move SECTOR_SIZE and SECTOR_SHIFT definitions into <linux/blkdev.h> 2020-09-09 19:03:12 +02:00
.gitignore
Kconfig