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4c37705877
As planned by Arnd Bergmann, this moves the following drivers to the drivers/staging/generic_serial directory where they will be removed after 2.6.41 if no one steps up to claim them. generic_serial rio ser_a2232 sx vme_scc Cc: Arnd Bergmann <arnd@arndb.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Jiri Slaby <jslaby@suse.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
72 lines
2.1 KiB
C
72 lines
2.1 KiB
C
/*
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** -----------------------------------------------------------------------------
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**
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** Perle Specialix driver for Linux
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** Ported from existing RIO Driver for SCO sources.
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*
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* (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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**
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** Module : pci.h
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** SID : 1.2
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** Last Modified : 11/6/98 11:34:12
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** Retrieved : 11/6/98 11:34:21
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**
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** ident @(#)pci.h 1.2
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**
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** -----------------------------------------------------------------------------
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*/
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#ifndef __rio_pci_h__
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#define __rio_pci_h__
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/*
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** PCI stuff
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*/
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#define PCITpFastClock 0x80
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#define PCITpSlowClock 0x00
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#define PCITpFastLinks 0x40
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#define PCITpSlowLinks 0x00
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#define PCITpIntEnable 0x04
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#define PCITpIntDisable 0x00
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#define PCITpBusEnable 0x02
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#define PCITpBusDisable 0x00
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#define PCITpBootFromRam 0x01
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#define PCITpBootFromLink 0x00
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#define RIO_PCI_VENDOR 0x11CB
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#define RIO_PCI_DEVICE 0x8000
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#define RIO_PCI_BASE_CLASS 0x02
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#define RIO_PCI_SUB_CLASS 0x80
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#define RIO_PCI_PROG_IFACE 0x00
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#define RIO_PCI_RID 0x0008
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#define RIO_PCI_BADR0 0x0010
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#define RIO_PCI_INTLN 0x003C
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#define RIO_PCI_INTPIN 0x003D
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#define RIO_PCI_MEM_SIZE 65536
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#define RIO_PCI_TURBO_TP 0x80
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#define RIO_PCI_FAST_LINKS 0x40
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#define RIO_PCI_INT_ENABLE 0x04
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#define RIO_PCI_TP_BUS_ENABLE 0x02
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#define RIO_PCI_BOOT_FROM_RAM 0x01
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#define RIO_PCI_DEFAULT_MODE 0x05
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#endif /* __rio_pci_h__ */
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